• Senior Silicon Logic Design Engineer

    Microsoft Corporation (Mountain View, CA)
    …optimize the Cloud infrastructure. We are looking for a **Senior Silicon Logic Design Engineer ** to join the team. **Responsibilities** In this role, you will be an ... such as timing closure, lint, CDC, synthesis, and low power intent + Collaborating with the verification team to...part of either CPU, Cache, Fabric, Compute Tile, Digital Power Management, PCMs, Debug, Peripherals and/or Subsystem and SoC… more
    Microsoft Corporation (08/27/25)
    - Related Jobs
  • Senior Physical Design Engineer

    NVIDIA (Santa Clara, CA)
    We are now looking for a Senior Physical Design Engineer . NVIDIA has continuously reinvented itself over two decades. Our invention of the GPU in 1999 sparked the ... participate in establishing physical design methodologies, flow automation, chip floorplan, power /clock distribution, chip assembly and P&R, timing closure. + Craft… more
    NVIDIA (08/23/25)
    - Related Jobs
  • Principal DSP Engineer - Coherent Optical…

    Cisco (San Jose, CA)
    Principal DSP Engineer - Coherent Optical Transmission Systems - Acacia Apply (https://jobs.cisco.com/jobs/Login?projectId=1444076) + Location:Maynard, ... from the DSP and ASIC teams is key to optimizing performance and power efficiency. You'll contribute to system design, develop architectures, and support ASIC design… more
    Cisco (08/23/25)
    - Related Jobs
  • Senior Analog/mixed-signal IC Design…

    Cisco (San Jose, CA)
    Senior Analog/mixed-signal IC Design Engineer - Acacia Apply (https://jobs.cisco.com/jobs/Login?projectId=1443040) + Location:San Jose, California, US + Alternate ... will also collaborate with packaging and hardware design team to ensure signal and power integrity specifications are met. + You will develop high speed AMS circuits… more
    Cisco (08/23/25)
    - Related Jobs
  • Charging Systems Modeling Engineer

    Ford Motor Company (Long Beach, CA)
    …future more sustainable. As a Range, Performance & Charging Systems Modeling engineer you will develop, modify, and correlate physics-based models for the charging ... of different fidelity for the HV and LV bus, power conversion device controls and charging system predictions ....design space and tradeoffs . Work closely with the power electronics, low voltage, charge port, HV and LV… more
    Ford Motor Company (08/22/25)
    - Related Jobs
  • Hardware Engineer - Signal Delivery…

    Teradyne (Agoura Hills, CA)
    …drives innovation and delivers better business results. Opportunity Overview The Hardware Engineer - Signal Delivery position in Agoura Hills works within a group ... and supporting development transmission line solutions for High-Speed Digital, Power and RF instruments used in various Teradyne test...100 Gbps. + Assist in design and development of power delivery systems that include low voltage (10 v),… more
    Teradyne (08/14/25)
    - Related Jobs
  • Electrical Engineer , Spectacles, L5

    Snap Inc. (Palo Alto, CA)
    …pair of glasses that bring augmented reality to life. We're looking for an Electrical Engineer , Devices to join the Spectacles team at Snap Inc! What you'll do: + ... and provide architectural-level trade-offs for product requirements. This involves performance, power , area, and cost + Test and validate electrical designs -… more
    Snap Inc. (08/13/25)
    - Related Jobs
  • Senior Staff IC Design Engineer

    Power Integrations (San Jose, CA)
    …IC Design Engineer , you will be responsible for switching power supply development of integrated circuits using CMOS/Bipolar analog/digital circuitry. Specific ... responsibilities are: + Mixed-mode integrated circuit design for switching power supply: + Simulation with Cadence tools. + Layout supervision and verification. +… more
    Power Integrations (08/09/25)
    - Related Jobs
  • Senior Timing Methodology Engineer

    NVIDIA (Santa Clara, CA)
    …inventiveness and intelligence. We are seeking an innovative Senior Timing Methodology Engineer to help drive sign-off strategies for the world's leading GPUs and ... Work on various aspects of STA, constraints, timing and power optimization. What We Need To See: + MS...fundamentals of electrical design. + Clear understanding of low power design techniques such as multi VT, Clock gating,… more
    NVIDIA (07/19/25)
    - Related Jobs
  • Quality Assurance (QA) Engineer , Cisco UCS…

    Cisco (San Jose, CA)
    Quality Assurance (QA) Engineer , Cisco UCS Blade BMC Apply (https://jobs.cisco.com/jobs/Login?projectId=1446630) + Location:San Jose, California, US + Area of ... team ensures the reliability and functionality of critical features such as power control, sensor monitoring, event logging, and remote diagnostics through protocols… more
    Cisco (07/16/25)
    - Related Jobs