• Senior Timing Methodology Engineer

    NVIDIA (Santa Clara, CA)
    …Block Activity Power , and Dynamic Voltage-Frequency Scaling (DVFS), CDC, signal/ power integrity , etc. + Understanding of 3DIC, stacking, packing, ... Work on various aspects of STA, constraints, timing and power optimization. What We Need To See: + MS...fundamentals of electrical design. + Clear understanding of low power design techniques such as multi VT, Clock gating,… more
    NVIDIA (07/19/25)
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  • Senior Electrical Design Engineer Lead

    Micron Technology, Inc. (San Jose, CA)
    …Analog Device LTspice or Cadence PSpice. + Familiarity with PCB layout, including power integrity (PI) and signal integrity (SI). **Preferred ... requirements and design analog circuits, including system and POL power supplies. + Lead FPGA design using HDL and...with lab equipment such as oscilloscopes, TDR, DMM, and power supplies. + Working knowledge of electronic circuit simulation… more
    Micron Technology, Inc. (08/20/25)
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  • High Speed RTL Design Engineer

    Broadcom (San Jose, CA)
    …with standard peripherals such as AMBA BUS/I2C/SPI/UART.** **- Deep understanding of Signal Integrity and Power Integrity modeling for High Speed designs.** ... PAM4 and design trade-offs to drive attainment on metrics such as performance, power , and cost over the project lifetime.** + **Experience in synthesis, CDC, static… more
    Broadcom (08/16/25)
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  • Physical Design Engineer

    Broadcom (San Jose, CA)
    …Qualifications:** + **Understanding of backend Cadence tools.** + **Deep understanding of Signal Integrity and Power Integrity for High Speed designs.** + ... CTS and place and route.** + **Experience in developing and implementing Power -grid and high speed clock constraints and specification.** + **Good understanding of… more
    Broadcom (08/12/25)
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  • RTL Synthesis Engineer

    Broadcom (San Jose, CA)
    …of Power analysis tools - Redhawk.** + **Deep understanding of Signal Integrity and Power Integrity for High Speed designs.** + **Proactive, ... optimization techniques and generating optimized Gate Level Netlist for Timing, Area, Power .** + **Debug the timing/area/congestion issues and work with RTL &… more
    Broadcom (08/08/25)
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  • Principal Analog Engineer

    Microsoft Corporation (Mountain View, CA)
    …and pre/post silicon validations + Review of analog IP related designs (signal and power integrity ) at different stages of development cycle + Review of ... and ensure appropriate integration + Review of the IP integrations, signal and power integrity , package and board designs with experts in Microsoft team as well… more
    Microsoft Corporation (08/14/25)
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  • Experienced Design and Analysis Engineer

    The Boeing Company (Huntington Beach, CA)
    …hardware products and systems. + Provide support input to aid EMI compatibility, signal integrity and power integrity analysis and simulation models. + Test, ... design (gate-level & VHDL) & simulation. + Experience with analog circuits, power supplies, and EMI protection devices. + Experience in quality assurance designs… more
    The Boeing Company (08/25/25)
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  • Analog Design Engineer / Principal Analog Design…

    Northrop Grumman (Los Angeles, CA)
    …Analysis tasks include circuit modeling, simulation and analysis as well as signal and power integrity analyses on PCB design. **This position is contingent upon ... Xpedition Designer and AMS + Experience with HyperLynx Signal and Power Integrity analyses + PSpice circuit design analyses + Experience Design verification… more
    Northrop Grumman (08/20/25)
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  • ASIC Package Engineer

    Meta (Sunnyvale, CA)
    **Summary:** Meta is looking for an experienced ASIC Packaging Engineer, Signal Integrity , and Power Integrity focus for its ASIC packaging team to support ... and what-if scenarios for novel packaging schemes to improve bandwidth, power efficiency, and form factor **Preferred Qualifications:** Preferred Qualifications: 19.… more
    Meta (08/13/25)
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  • System Debug Lead Engineer

    NVIDIA (Santa Clara, CA)
    …management, and firmware + Proven experience in debugging electrical issues (eg, signal integrity , power integrity ), thermal issues (eg, airflow, cooling ... design), and firmware anomalies (eg, BIOS/UEFI, BMC) + Proficiency in tools such as oscilloscopes, logic analyzers, and firmware debug equipment/utilities + Strong communication skills and the ability to work across fields and teams + Experience working with… more
    NVIDIA (07/26/25)
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