- NVIDIA (Santa Clara, CA)
- …Service Provider deployments. + Debug and troubleshoot NVIDIA GPU firmware issues, power management, performance , and thermal control problems for data center ... introductions. + Perform advanced system debugging, root cause analysis, and performance optimization for large-scale data center environments. + Collaborate with… more
- Meta (Menlo Park, CA)
- …to hardware implementations, model data-flows, create cost-benefit analysis and estimate silicon power and performance 3. Contribute to the development of ... and analysis tools 4. Conduct design and code reviews. Evaluate code performance , debug, diagnose and drive resolution of compiler and cross-disciplinary system… more
- Meta (Sunnyvale, CA)
- …to hardware implementations, model data-flows, create cost-benefit analysis and estimate silicon power and performance 3. Contribute to the development of ... and analysis tools 4. Conduct design and code reviews. Evaluate code performance , debug, diagnose and drive resolution of compiler and cross-disciplinary system… more
- Meta (Sunnyvale, CA)
- …degree in Electrical Engineering, Computer Engineering or related areas Experience driving power and performance trade-offs 10. Experience in developing and ... and map data center workloads to ASIC architecture, as well as develop performance and functional models to validate the architecture 3. Implement various reference… more
- NVIDIA (Santa Clara, CA)
- …computing, are driving the next evolution of artificial intelligence by combining high performance compute, networking, and full-stack software to power AI at ... role, you will show how NVIDIA solutions deliver industry-leading inference and training performance and power efficiency while addressing the real challenges of… more
- Amazon (Sunnyvale, CA)
- …for ASIC/SOC development considering all criteria to design products the meet the power / performance and functional specs for all use conditions. - Work with ... ASIC, communication system, EE, and software teams to define ASIC bring-up readiness and test plans. - Work with product/program management lead to ensure that ASIC/SOC development meets schedule, cost, and quality requirements. - Drive engineering project… more
- Cadence Design Systems, Inc. (San Jose, CA)
- …of the Genus Synthesis Solution, a state-of-the-art logic synthesis tool that optimizes Power , Performance , and Area (PPA) for advanced digital ASICs. This ... internship offers hands-on experience in software development for EDA tools, working closely with R&D and product engineering teams in a collaborative, innovation-driven environment. Responsibilities + Design, implement, troubleshoot, and debug software… more
- Snap Inc. (San Diego, CA)
- …performant and energy efficient solutions Preferred Qualifications: + Experience in power / performance optimizations, including Linux kernel, driver, and user ... space applications. + Understanding of hardware design, ability to read schematics If you have a disability or special need that requires accommodation, please don't be shy and provide us some information… more
- NVIDIA (Santa Clara, CA)
- …Advanced Technology Group (ATG). NVIDIA's GPUs and SOCs are the world leaders in power , performance and efficiency. We are continually innovating to deliver new ... and creative solutions to extraordinary problems in a wide range of sectors. To this purpose, we are now seeking a passionate Package Design Engineer who is committed to making a difference in the world through their contributions. You will be responsible for… more
- Cadence Design Systems, Inc. (San Jose, CA)
- …team to evaluate and improve Genus, a logic synthesis tool used to optimize Power , Performance , and Area (PPA) for advanced digital ASICs. + Analyze and ... validate new features within Genus, ensuring correctness and identifying optimal configurations. + Explore and address challenges in physically aware synthesis, bridging the gap between logic synthesis and place & route. + Support internal teams and customers… more