- Cadence Design Systems, Inc. (San Jose, CA)
- …team to evaluate and improve Genus, a logic synthesis tool used to optimize Power , Performance , and Area (PPA) for advanced digital ASICs. + Analyze and ... validate new features within Genus, ensuring correctness and identifying optimal configurations. + Explore and address challenges in physically aware synthesis, bridging the gap between logic synthesis and place & route. + Support internal teams and customers… more
- EMCOR Group (Sacramento, CA)
- …of belts and pulleys, inspection and cleaning of condensate drain lines, testing power / performance of compressor, fan motor, blower motor, testing function and ... safety of burners/heat exchangers, function of all safety and operational controls. . General repairs of steam/hot water boiler systems. Diagnose airflow and ducting repairs. . Safe, efficient, and EPA compliant use of refrigerants in support of standard… more
- Cadence Design Systems, Inc. (San Jose, CA)
- …Ethernet protocol is a plus. + Understanding of digital architecture trade-offs for power , performance , and area + Understanding of proper handling of multiple ... asynchronous clock domains and their crossings + Understanding of Lint checks and proper resolution of errors + Understanding synthesis timing constraints, static timing analysis and constraint development + Understanding of fundamental physical design flows… more
- Amazon (Cupertino, CA)
- …or related field - Experience in RTL coding and debug, as well as performance , power , area analysis and trade-offs - Experience with modern ASIC/FPGA design ... be constantly looking for ways to improve your products performance , quality and cost. We're changing an industry, and...trust our robust suite of products and services to power their businesses. Utility Computing (UC) AWS Utility Computing… more
- NVIDIA (Santa Clara, CA)
- …test plans and other enablement collateral + Analyze and optimize system performance , power consumption and thermal integration + Help solve deeper ... will be responsible for ensuring product quality and reliability, optimizing system performance , and improving the integration process. You will help to engage with… more
- Cisco (Milpitas, CA)
- …Analyze and optimize designs for efficiency, focusing on resource utilization, power consumption, and thermal performance . **Minimum Qualifications:** + 8+ ... Hardware Team at Cisco is responsible for designing and developing high- performance , secure firewall hardware platforms that protect enterprise, data center, and… more
- Broadcom (San Jose, CA)
- …lane PAM4 and NRZ design trade-offs to drive attainment on metrics such as performance , power , and cost over the project lifetime. + Experience translating CDR ... PAM4 signals. + Understanding of logic optimization for low power , timing margins & DFT. + Deep understanding of...& DFT. + Deep understanding of Signal Integrity and Power Integrity modeling for High Speed designs. + Understanding… more
- Broadcom (San Jose, CA)
- …per lane PAM4 and design trade-offs to drive attainment on metrics such as performance , power , and cost over the project lifetime.** + **Experience in synthesis, ... + **Must have excellent knowledge/experience with TSMC 7nm-2nm, ie understanding of power consumptions, area, estimated design and layout efforts for digital and… more
- Meta (Sunnyvale, CA)
- …Lead hardware bring up, peripheral drivers and communication, silicon integration, and power and performance management and optimization efforts 4. Debug ... issues that span multiple layers from kernel to application 5. Profile performance problems and drive optimizations across the entire software stack 6. Integrate… more
- NVIDIA (Santa Clara, CA)
- …engineers to deliver innovative real-time user mode drivers that enable breakthrough performance in low- power , high- performance solutions for NVIDIA's GPUs ... and display technologies. + Create and own team strategy, roadmaps, and schedules. + Provide architectural and technical guidance to the team and ensure that the best engineering practices are followed. + Work closely with HW teams to architect graphics and… more