- NVIDIA (Santa Clara, CA)
- … metrics and drive power reductions + Execute and deliver fully verified, high performance , area and power efficient RTL to achieve design targets + You will ... We are now looking for a Senior ASIC Power Engineer! NVIDIA is seeking extraordinary power...system designs to extend the state of the art performance and efficiency + You are expected to understand… more
- SanDisk (Milpitas, CA)
- …a cutting edge 3D memory in our multi-billion dollars Fab. Our memory provides performance , power , and endurance at a lower cost without forgoing quality. The ... logic synthesis, and timing analysis to deliver a design meeting target power , performance and area goals. ESSENTIAL DUTIES AND RESPONSIBILITIES: + RTL design… more
- Capgemini (Los Angeles, CA)
- …to support robust analytics solutions. + Implement and manage Row-Level Security (RLS) and performance optimization in Power BI reports. + Work closely with data ... Data (I&D) team is seeking a highly skilled Senior Power BI Consultant with a strong background in business...stakeholders to gather and translate reporting requirements into effective Power BI dashboards and visualizations. + Design and develop… more
- Cadence Design Systems, Inc. (San Jose, CA)
- …Takes technical lead on wide range of projects. Ability to understand high-speed, high- performance signal and power integrity related issues, and work with peers ... the context of multiple flows including high speed signal and/or power design, signal and power integrity. Design experience and industry knowledge of Signal, … more
- Capgemini (Sunnyvale, CA)
- …of digital blocks at both the block and full-chip level, contributing to high- performance , low- power silicon solutions. You'll join a supportive team that values ... power plan, congestion analysis, and hierarchical synthesis. + Enhance power , performance , and area (PPA) through RTL compilation and placement feedback. +… more
- NVIDIA (Santa Clara, CA)
- …design methodologies for implementation of GPU, CPU and SOCs, with emphasis on PPA ( Power , Performance , Area) and runtime improvement of the physical design flow ... Engineering + Proven track record of PPA improvement on high performance and low power designs in advanced technology nodes + Strong understanding of physical… more
- NVIDIA (Santa Clara, CA)
- …your programming background to manage & manipulate complex datasets to assess performance , power , yield, and quality improvements for NVIDIA's family of ... improve the data modelling infrastructure and test procedures. + Identify performance and power -limiting constraints and drive product-specific customizations.… more
- NVIDIA (Santa Clara, CA)
- …NVIDIA GPUs. You will collaborate with Architects, ASIC Design Engineers, Low Power Engineers, Performance Engineers, Software Engineers, and Physical Design ... with the goal of bridging early estimates to silicon. + Work with performance infrastructure teams to integrate power /energy models into their platforms to… more
- Meta (San Diego, CA)
- … models for Augmented Reality/Virtual Reality (AR/VR) graphics pipeline 2. Lead power / performance modeling and analysis of graphics pipeline components, features ... of our silicon technology/graphics roadmap to make beyond state-of-the-art advances in performance , power consumption and form factor 5. Work across disciplines,… more
- Meta (Sunnyvale, CA)
- …& Integration Engineer 12. Experience with RTL Synthesis and design optimization for Power , Performance , Area 13. Knowledge of front-end and back-end ASIC tools ... and generate optimized Gate Level Netlist for Timing, Area, Power 2. Debug the timing/area/congestion issues and work with...RTL & Physical designers to resolve them 3. Perform Power Estimation at RTL and Gate Level and identify… more