- Google (Sunnyvale, CA)
- …. **Responsibilities** + Innovate and design on rack and data center power conversion specifications and solutions. Analyze performance , cost, reliability and ... Senior AC/DC Rack Power Engineer, Platforms, Infrastructure _corporate_fare_ Google _place_ Sunnyvale,...shape the next generation of hardware experiences, delivering unparalleled performance , efficiency, and integration. In this role, you will… more
- Meta (Sunnyvale, CA)
- …1. Develop and own physical design implementation of multi-hierarchy low- power and high- performance designs, including physical-aware logic synthesis, ... IP or integration of ASIC/SoC design and point out lower power and higher performance trade-offs 4. Define and implement schemes, including semi-custom placement… more
- Meta (Sunnyvale, CA)
- …XR systems to enable the next great wave of human-oriented computing. The compute performance and power efficiency requirements of these future XR systems will ... and integrate promising techniques into shipping products 7. Run analysis/profiling, identify performance and power bottlenecks on the actual hardware, virtual… more
- Amazon (Cupertino, CA)
- …- Work with RTL/logic designers to drive architectural feasibility studies, explore power - performance -area tradeoffs for physical design closure - Drive IO/Core ... synthesis, floor planning, bus / pin planning, place and route, power /clock distribution, congestion analysis, timing closure, IR drop analysis, physical… more
- Google (Sunnyvale, CA)
- …. **Responsibilities** + Innovate and design data center power conversion specifications and solutions. Analyze performance , ... Power Electronics Engineer _corporate_fare_ Google _place_ Reston, VA,...equivalent practical experience. + 10 years of experience with power converter design including AC/DC, DC/DC, or DC/AC converter… more
- NVIDIA (Santa Clara, CA)
- …on the new process design challenges, have the chance to create novel low power and high performance circuits, and develop in-house design and verification flows ... concepts of the transistor level circuit design, modeling and performance analysis process and optimize design for power... performance analysis process and optimize design for power , timing, area and yield + You'll make the… more
- TP-Link North America, Inc. (Irvine, CA)
- …and other embedded systems. + Conduct performance analysis and optimize system performance , memory usage, and power consumption. + Write, debug, and test ... performant (reliable and scalable) software solutions in production + Experience with power and performance optimization techniques for embedded devices. +… more
- Intel Corporation (Folsom, CA)
- …and methods to write RTL and optimize logic to qualify the design to meet power , performance , area, and timing goals as well as design integrity for physical ... architectures that define the future of computing, from mobile devices to high- performance computing systems. We're pushing the boundaries of what's possible in… more
- Cisco (San Jose, CA)
- …with colleagues from the DSP and ASIC teams is key to optimizing performance and power efficiency. You'll contribute to system design, develop architectures, ... modeling, you help the team to develop the next generation of low- power and high- performance coherent transceivers. Here are some examples of possible topics: *… more
- quadric.io, Inc (Burlingame, CA)
- …definition & RTL implementation of the processor in SystemC or SystemVerilog + Own Power , Performance & Area (PPA) optimization + Contribute to timing closure ... and endpoint devices, ranging from battery operated smart-sensor systems to high- performance automotive or autonomous vehicle systems. Unlike other NPUs or neural… more