• Principal CPU Systems Debug…

    Qualcomm (Santa Clara, CA)
    …Engineering Group > CPU Engineering **General Summary:** We are hiring a talented engineer for CPU System Debug Architecture/RTL engineer targeted for high ... Perl or Python. **Roles and Responsibilities** As an Architect/RTL engineer you will own or participate in the following:...reliability, testability and power. * Work alongside with Software, Firmware and platform team to make CPU systems features… more
    Qualcomm (07/20/25)
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  • Principal Software Engineer

    Microsoft Corporation (Santa Clara, CA)
    …and deliver significantly superior performance compared to CPU-based alternatives. As a Software Engineer in the DPU Integration and Test team, you will be involved ... experience in testing networking, storage or server platforms as a lead engineer owning releases and mentoring/guiding a team of engineers. **Other Qualifications**… more
    Microsoft Corporation (08/08/25)
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  • Principal Silicon Validation…

    Blue Cheetah Analog Design (Sunnyvale, CA)
    Silicon Validation Engineer Engineer [On-site Position - Sunnyvale, CA] Blue Cheetah Analog Design Inc. is a semiconductor technology start-up headquartered in ... and PHYs supporting protocols such as DDR, Ethernet, PCIe, USB * Develop Firmware required for silicon validation and customer platforms. * PCB and package design… more
    Blue Cheetah Analog Design (07/14/25)
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  • Principal Engineer , Reliability…

    SanDisk (Milpitas, CA)
    …**Job Description** We are seeking an experienced and detail-oriented Reliability Engineer with expertise in product reliability testing, thermal chamber operations, ... cross-functional projects from planning through implementation. + Familiarity with hardware/ firmware debugging and root cause analysis techniques. + On-site work… more
    SanDisk (08/02/25)
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  • Principal Test Engineer

    Palo Alto Networks (Santa Clara, CA)
    …next generation network firewalls. We are looking for a talented test engineer with extensive experience in developing diagnostics and validation. The ideal ... troubleshooting skills, with the ability to isolate hardware, software, and firmware issues in a fast-paced environment + Experience collaborating with… more
    Palo Alto Networks (07/14/25)
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  • Principal FPGA Design Engineer

    Cadence Design Systems, Inc. (San Jose, CA)
    …FPGAs in the lab using Vivado hardware manager, debugging with firmware /software + Experience using Linux servers, Script development using Shell/Perl/TCL + ... Experience using Cadence Simulators Incisive or Xcelium + Detailed knowledge about industry standard interfaces such as PCI Express, DRAM/DDR4, SRAM, I2C, JTAG, AXI The annual salary range for California is $131,600 to $244,400. You may also be eligible to… more
    Cadence Design Systems, Inc. (08/08/25)
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  • Principal Engineer R&D

    Toshiba America Electronic Components, Inc (San Jose, CA)
    …project team to meet product specifications. + Produce quality embedded firmware , participate in peer design reviews and provide supporting design/evaluation ... documentation. + Communicate effectively and work closely with other remote development teams. Requirements: + 15+ years of years of directly applicable experience. + Strong fundamentals in signal processing, servo systems and control theories. + Excellent… more
    Toshiba America Electronic Components, Inc (07/31/25)
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  • DSP or Serdes RTL Sr Principal Digital…

    Cadence Design Systems, Inc. (San Jose, CA)
    …+ Experience with FPGA and/or emulation platform is a plus. + Firmware development of embedded microcontroller systems is a plus. Substantial experience with ... Verilog is required, as are excellent logic and debug skills. Engineering expertise in mixed-signal IP development procedures and Ethernet connectivity protocol knowledge are also strongly preferred. #LI-MA1 The annual salary range for California is $154,000… more
    Cadence Design Systems, Inc. (07/18/25)
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  • Principal FPGA Design Engineer

    Cadence Design Systems, Inc. (San Jose, CA)
    …FPGAs in the lab using Vivado hardware manager, debugging with firmware /software + Experience using Linux servers, Script development using Shell/Perl/TCL + ... Experience using Cadence Simulators Incisive or Xcelium + Detailed knowledge about industry standard interfaces such as PCI Express, DRAM/DDR4, SRAM, I2C, JTAG, AXI The annual salary range for California is $131,600 to $244,400. You may also be eligible to… more
    Cadence Design Systems, Inc. (07/09/25)
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  • Principal Engineer ,Product…

    SanDisk (Milpitas, CA)
    …a critical interface between various cross-functional teams, including Test, Reliability, Firmware , ASIC, NAND Design, Operations + Identify and mitigate risks ... during development, performing failure analysis and driving corrective actions. + Provide data-driven insights to leadership for critical decisions on products, infrastructure, and manufacturing processes. + Improve group efficiency through automation… more
    SanDisk (07/08/25)
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