- BAE Systems (San Diego, CA)
- …available based on position level and/or job specifics. **Senior Principal Design Verification Engineer - FPGA - (Sign-on Bonus)** **113449BR** EEO ... and advancing your career. BAE is looking for experienced senior level FPGA Design Verification Engineers who can plan, architect, and develop verification … more
- Northrop Grumman (San Diego, CA)
- …history, they're making history. Explore a career engineering what's possible as a Digital Verification Engineer in San Diego, CA. **What You'll Get to Do:** Our ... manufacturing just minutes from the beach Southern California is famous. As a Digital Verification Engineer at Northrop Grumman, you will have an opportunity to… more
- The Boeing Company (Huntington Beach, CA)
- …Systems has an exciting opportunity for multiple **ASIC and/or FPGA Design and Verification Engineers (Lead, Senior or Principal )** to join us as part of our ... Strike, Surveillance and Mobility; and Autonomous Systems). As an ASIC/ FPGA Engineer on the Boeing Electronic Products...across the company and around the world and support ASIC/ FPGA design and verification for electronics that… more
- Silvus Technologies (Irvine, CA)
- …that creates a pathway to a fulfilling career. THE OPPORTUNITY Silvus is seeking a full-time Principal FPGA / RTL Design Engineer who will report to the ... projects aimed at addressing challenging real-world communication needs. The Principal FPGA / RTL Design Engineer...* RTL coding, simulation, and test bench development. * FPGA synthesis and timing closure. * Hardware verification… more
- Cadence Design Systems, Inc. (San Jose, CA)
- …, timing closure and hardware validation of the FPGA IPs. + Developing field-programmable gate array intellectual properties ( FPGA IPs) for Protium ... and releasing the IPs to end users; + Working on FPGA IP Design, Verification /Simulation, Timing closure, Validation of IP on the hardware; + Enhancing… more
- Cadence Design Systems, Inc. (San Jose, CA)
- …, timing closure and hardware validation of the FPGA IPs. + Developing field-programmable gate array intellectual properties ( FPGA IPs) for Protium ... and releasing the IPs to end users; + Working on FPGA IP Design, Verification /Simulation, Timing closure, Validation of IP on the hardware; + Enhancing… more
- Northrop Grumman (San Diego, CA)
- …at a higher grade based on the requirements below._ **Basic Qualifications Principal Digital Engineer :** + Bachelor's degree in Electrical Engineering or ... in order to obtain and maintain security clearance **Basic Qualifications Senior Principal Digital Engineer ** + Bachelor's degree in Electrical Engineering or… more
- Qualcomm (San Diego, CA)
- …verifies, and optimizes performance and power of GPU cores. Responsible for verification of Graphics IP , and performing pre- and post-silicon verification ... processes of diagnosis/detection; some limited data analysis may be required. ** PRINCIPAL DUTIES AND RESPONSIBILITIES:** + Applies Graphics knowledge and experience… more
- Cadence Design Systems, Inc. (San Jose, CA)
- …scripting and developing flows at all phases of the digital design and functional verification . It is further expected that the candidate will be able to work as ... and documentation + RTL logic design, debug and functional verification + Strong background in DSP and algorithms is...and be self-motivated and well organized. + Experience with FPGA and/or emulation platform is a plus. + Firmware… more
- Silvus Technologies (Los Angeles, CA)
- …or senior engineers involved in a given project or R&D program for which the Principal Engineer is responsible. **REQUIRED QUALIFICATIONS** + MS or Ph.D. in a ... that creates a pathway to a fulfilling career. **THE OPPORTUNITY** The ** Principal Investigator - R&D Engineering** position reports to the _Director of R&D_… more