- Palo Alto Networks (Santa Clara, CA)
- …to Prisma Access (TM) Cloud. We are seeking an experienced Software Engineer to design, develop and deliver next-generation technologies within our GlobalProtect ... to craft strategic roadmaps that elevate Endpoint capabilities and ensure smooth integration with the new Prisma Access agent. + Design scalable system… more
- Autodesk (San Francisco, CA)
- …Workflow Rules are used with code-based solutions + Lead complex integration projects, including designing integrations with other applications using APIs, ... + Define and oversee advanced testing strategies, including unit tests, integration tests, and user acceptance tests for complex scenarios. Ensure comprehensive… more
- Northrop Grumman (Redondo Beach, CA)
- …and best practices; experience with network challenges associated with systems integration , including COTS integration , capacity analysis and system architecture ... design + Demonstrated leadership skills, or previous management of small teams, would be helpful We offer flexible work arrangements, phenomenal learning opportunities, exposure to a wide variety of projects and customers, and a very friendly team environment.… more
- Microsoft Corporation (Mountain View, CA)
- …with partner teams-including experience, SDK, and platform groups-to ensure seamless integration and delivery of features across the stack. **Build Foundational ... developer platforms, or cloud services. + Experience engaging with customers during integration or deployment phases, with a focus on delivering value and… more
- General Motors (Mountain View, CA)
- …+ Collaborate closely with multidisciplinary engineering groups, ensuring seamless integration of localization, sensor alignment, and other capabilities into ... in C++ and Python, alongside extensive hands-on experience with development, integration , and testing tools. + Excellent communication, collaboration, and mentoring… more
- Palo Alto Networks (Santa Clara, CA)
- …- Experience with or familiarity of Test Driven Development and Continuous Integration is required + Experience developing microservice based solutions on public ... cloud infrastructure is highly desirable - Experience developing in Kubernetes based environments is a plus + Experience building data management solutions using transactional data stores is required - Knowledge of and experience building enterprise software… more
- Cadence Design Systems, Inc. (San Jose, CA)
- …intellectual properties (FPGA IPs) for Protium platform, including design, verification, integration , timing closure, documentation and releasing the IPs to end ... users; + Working on FPGA IP Design, Verification/Simulation, Timing closure, Validation of IP on the hardware; + Enhancing current IPs as well as developing new IPs. + Debug and fix internal regression failures for FPGA IPs. + Documentation of IPs The ideal… more
- Broadcom (Palo Alto, CA)
- …reviews, baseline security tests, fuzzing, reviewing/writing code, security tool development/ integration , security architecture and other techniques. In the first ... 6mths, you will be expected to become intimately familiar with the products/components and supply chain security concerns assigned to you. You should also be able to perform architecture reviews, assess threats, and perform security testing to find and fix… more
- Palo Alto Networks (Santa Clara, CA)
- …must + Experience with or familiarity of Test Driven Development and Continuous Integration is required + Experience developing in Kubernetes based environments is a ... plus + Experience developing microservice based solutions on public cloud infrastructure is highly desirable + MS/BS in Computer Science or equivalent or equivalent military experience **The Team** To stay ahead of the curve, it's critical to know where the… more
- Cadence Design Systems, Inc. (San Jose, CA)
- …intellectual properties (FPGA IPs) for Protium platform, including design, verification, integration , timing closure, documentation and releasing the IPs to end ... users; + Working on FPGA IP Design, Verification/Simulation, Timing closure, Validation of IP on the hardware; + Enhancing current IPs as well as developing new IPs. + Debug and fix internal regression failures for FPGA IPs. + Documentation of IPs Position… more