- Silvus Technologies (Irvine, CA)
- …fulfilling career. THE OPPORTUNITY Silvus is seeking a full-time Principal FPGA / RTL Design Engineer who will report to the Senior Engineering Director ... at addressing challenging real-world communication needs. The Principal FPGA / RTL Design Engineer position will be based at Silvus' Irvine CA… more
- Cadence Design Systems, Inc. (San Jose, CA)
- …but is not limited to: + Digital microarchitecture definition and documentation + RTL logic design , debug and functional verification + Strong background in ... and developing flows at all phases of the digital design and functional verification. It is further expected that...well as a thorough understanding of the end-to-end digital design flow in order to accurately and efficiently collaborate… more
- Qualcomm (Santa Clara, CA)
- …Summary:** We are hiring a talented engineer for CPU System Debug Architecture/ RTL engineer targeted for high performance, low power devices. In this role, ... as Perl or Python. **Roles and Responsibilities** As an Architect/ RTL engineer you will own or participate... RTL ownership. Development, assessment and refinement of RTL design to target power, performance, area… more
- Microsoft Corporation (Mountain View, CA)
- …looking for passionate engineers to help achieve that mission. We are looking for a ** Principal Design Engineer ** to work in the dynamic Microsoft Artificial ... **Responsibilities** + Own and drive the development of microarchitecture and RTL design , coding, and verification of complex IP blocks, including: +… more
- SanDisk (Milpitas, CA)
- …aspects of digital design in NAND Flash memory, focusing on micro architecture, RTL design , verification, logic synthesis, and timing analysis to deliver a ... of innovation. We are looking for an experienced Staff Engineer to lead and deliver projects for our Memory...performance and area goals. ESSENTIAL DUTIES AND RESPONSIBILITIES: + RTL design and verification in Verilog, … more
- Microsoft Corporation (Mountain View, CA)
- …Azure cloud servers, clients, and augmented reality. We are looking for a ** Principal Design Engineer ** to work in the dynamic Microsoft Artificial ... features + Be responsible for + Microarchitecture and Logic design /Register Transfer Level ( RTL ) entry + Power,...+ Microarchitecture and Logic design /Register Transfer Level ( RTL ) entry + Power, performance, area (PPA) closure of… more
- SanDisk (Milpitas, CA)
- …level and full chip circuit simulations to meet all performance specifications. + RTL design , synthesis, static timing analysis and verification in verilog for ... experience in Nand page buffer design + Knowledge and/or experience in RTL design + Knowledge and/or experience in non-volatile memory design (NAND flash… more
- Cadence Design Systems, Inc. (San Jose, CA)
- …and innovators who want to make an impact on the world of technology. Sr Principal Application Engineering (AE) - a blend of pre-sales, post-sales and design ... technologies in Synthesis, P&R, and Signoff to meet/exceed their PPA targets, achieve faster design closure, and turn design concepts into reality. You will also… more
- Northrop Grumman (San Diego, CA)
- …tools; 3 years with an MS degree; 0 years with PhD. + Experience in RTL design and verification methodologies for wireless systems + FPGA development process ... higher grade based on the requirements below._ **Basic Qualifications Principal Digital Engineer :** + Bachelor's degree in...MS degree; 4 years with PhD. + Experience in RTL design and verification methodologies for wireless… more
- Cadence Design Systems, Inc. (San Jose, CA)
- …& Route (Innovus, ICC2, Fusion Compiler) + Exposure and experience with Synthesis (Genus, RTL Compiler, Design Compiler) + Experience with EDA tools in the IC ... + Provide technical support to Cadence customers in the areas of Digital Design Implementation & Signoff including Synthesis, Place and Route, Design Closure,… more