• R&D IC Design Engineer

    Broadcom (Irvine, CA)
    …Layer Products for High Speed Optical Communication. architect block level design specifications from the marketing requirements and/or system requirements prepare ... detailed design document, timing constraint file RTL coding, Lint checks,...Good Knowledge in languages relevant to the ASIC development process including Verilog, VHDL, Unix/Perl Scripting or Python, and… more
    Broadcom (12/30/25)
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  • R&D IC Design Engineer

    Broadcom (Irvine, CA)
    …apply.** **Job Description:** + This opening work on chip design which enables 10Gbps/40Gbps/100Gbps/400Gbps backplane/cable/optical fiber communication + architect ... block level design specifications from the marketing requirements and/or system requirements...Good Knowledge in languages relevant to the ASIC development process including Verilog, VHDL, Unix/Perl Scripting or Python, and… more
    Broadcom (12/30/25)
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  • Analog/mixed-signal IC Design

    Cisco (San Jose, CA)
    …ultra-long haul telecommunication networks. **Meet the Team** We are Mixed-signal IC design group that develops high speed ()25Gb/s), and high accuracy, analog ... designs for optical communications products. We optimize design that will integrate into the ASIC. Our team...for the role in your location during the hiring process . US employees are offered benefits, subject to Cisco's… more
    Cisco (12/24/25)
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  • RF & Microwave Power Amplifier Design

    Teledyne (Rancho Cordova, CA)
    …factory automation, air and water quality environmental monitoring, electronics design and development, oceanographic research, deepwater oil and gas exploration ... the excitement of being on a team that wins. **Job Description** ** Design high-power RF solutions that drive mission-critical systems.** Teledyne Defense Electronics… more
    Teledyne (11/08/25)
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  • Design Verification Engineer

    Arrow Electronics (Mountain View, CA)
    **Position:** Design Verification Engineer **Job Description:** Principal Accountabilities * Responsible for architecting Verification Environment for ASIC SoC ... from defining verification plan to multi-million gate product tapeout & for Test design and development * Develop complex self checking test benches with constraint… more
    Arrow Electronics (12/25/25)
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  • Senior Mechanical Project Engineer

    Jacobs (Los Angeles, CA)
    …to the success of these projects. We're looking for a skilled Project Engineer to manage and supervise subcontract and material resources in relation to construction ... Engineers to ensure technical documentation is up to date, including submittals, RFIs, design changes, and record documents. Here's what you will be doing: * Ensure… more
    Jacobs (12/20/25)
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  • ASIC Physical Design and Timing…

    NVIDIA (Santa Clara, CA)
    …human inventiveness and intelligence. We are now looking for a motivated ASIC Timing Engineer to join our dynamic and growing team. If you want to challenge yourself ... and intelligence. What you'll be doing: + Drive Physical Design and timing analysis and closure of NVIDIA's GPUs,...GPUs or Network processors. + Knowledge of deep sub-micron process nodes. + Proficiency in AI/LLM and programming languages.… more
    NVIDIA (10/17/25)
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  • Senior Mixed Signal Design Engineer

    NVIDIA (Santa Clara, CA)
    …PLL for high speed IO interfaces + In-depth understanding of deep submicron CMOS process and related circuit design issues + Experience in silicon bring-up, ... of our Mixed Signal team, you will lead the design of CMOS high-speed interface circuits and mixed-signal circuits....and bring up. What you'll be doing: + Lead design and implementation of high speed interface circuit +… more
    NVIDIA (10/21/25)
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  • Senior Layout Mask Design Engineer

    NVIDIA (Santa Clara, CA)
    …part of the Digital IP Team, you will work with other team members on the new process design challenges. You will have the chance to work on custom and compiler ... We are looking for you! You'll work on the design and development of our next generation custom SRAM...ram layouts with cut in edge process technology that would be used on all the… more
    NVIDIA (11/20/25)
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  • Senior Silicon Circuits System Design

    NVIDIA (Santa Clara, CA)
    …+ You will evaluate and work with pre-production silicon in brand-new process technologies to characterize and optimize performance, power, yield, and quality for ... and silicon features, correlate silicon behavior with simulations, and provide design feedback. + Driving new feature initiatives across multiple business units,… more
    NVIDIA (12/18/25)
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