• Hardware Modeling Engineer

    Cisco (San Jose, CA)
    Hardware Modeling Engineer Apply (https://jobs.cisco.com/jobs/Login?projectId=1441704) + Location:San Jose, California, US + Area of InterestEngineer - Hardware + ... collaboration and rapid innovation. Together, we're building a unified, programmable silicon architecture foundational to Cisco's future routing products. **Your… more
    Cisco (07/09/25)
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  • Senior Electrical Engineer

    CACI International (Los Gatos, CA)
    Senior Electrical Engineer Job Category: Engineering Time Type: Full time Minimum Clearance Required to Start: Secret Employee Type: Regular Percentage of Travel ... of DC-10GHz ADC and DAC circuits along with interfaces to high performance Field Programmable Gate Arrays (FPGAs). + Analyze and simulate analog circuits as part of… more
    CACI International (07/08/25)
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  • Automation Controls Engineer /DCS/PLC…

    Honeywell (San Mateo, CA)
    As an Automation Controls Engineer /DCS/PLC Programmer at Honeywell, you will be accountable for providing technical assistance and services to our customers in the ... verification and cross check with licensing + Knowledge of other DCS / Programmable Logic Controller (PLC) systems such as ABB, Yokogawa, Emerson Delta V, Siemens,… more
    Honeywell (06/25/25)
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  • Senior Systems Software Security Engineer

    NVIDIA (Santa Clara, CA)
    NVIDIA is seeking a highly motivated and experienced Senior Systems Software Security Engineer to join our Data Center Systems team. This role focuses on factory and ... The ideal candidate will have a deep understanding of One-Time Programmable (OTP) memory, security controls, and end-to-end factory provisioning processes. What… more
    NVIDIA (06/19/25)
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  • CF Project Engineer

    Insight Global (San Jose, CA)
    Job Description As a Project Engineer , you will become a key member of the Critical Facilities team and essential in ensuring the successful completion of complex ... team. Programming of complex DDC (Direct Digital Controls) and PLC ( Programmable Logic Controller) systems to meet project specifications and mechanical systems… more
    Insight Global (06/05/25)
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  • Senior ASIC Verification Engineer - GPU

    NVIDIA (Santa Clara, CA)
    …position, you will help to build the high-performance processor elements that implement programmable compute and graphics functionality. What you'll be doing: + As a ... hardworking people in the world working for us. Are you a creative and autonomous engineer who loves a challenge? Come join our GPU ASIC Verification team and help… more
    NVIDIA (06/03/25)
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  • R&D Electronics Engineer

    Actalent (Fallbrook, CA)
    …Experienced in using oscilloscopes, digital multimeters, waveform generators, and programmable power supplies. + Ability to create technical documentation, including ... specifications, work instructions, and maintenance manuals. Additional Skills & Qualifications + Experience with robotic integration and machine design programming is preferred. + Familiarity with platforms such as Direct Logic, Do-more, and C-more. +… more
    Actalent (08/14/25)
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  • Principal FPGA Design Engineer

    Cadence Design Systems, Inc. (San Jose, CA)
    …timing closure and hardware validation of the FPGA IPs. + Developing field- programmable gate array intellectual properties (FPGA IPs) for Protium platform, including ... design, verification, integration, timing closure, documentation and releasing the IPs to end users; + Working on FPGA IP Design, Verification/Simulation, Timing closure, Validation of IP on the hardware; + Enhancing current IPs as well as developing new IPs.… more
    Cadence Design Systems, Inc. (08/08/25)
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  • SOC RTL Design Engineer , Hardware Compute…

    Amazon (Sunnyvale, CA)
    …In-depth knowledge of in one or more areas such as CPU, DSP, or programmable accelerators - SoC bring-up and post silicon validation experience - Experience with ... early RTL power analysis - Experience with gate level testing and multi clock design practices - Successful tape outs of complex, high-volume SoCs in advanced design nodes - Experience with DFT tools for scan and BIST insertion - Experience with using AI tools… more
    Amazon (07/24/25)
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  • Principal FPGA Design Engineer

    Cadence Design Systems, Inc. (San Jose, CA)
    …timing closure and hardware validation of the FPGA IPs. + Developing field- programmable gate array intellectual properties (FPGA IPs) for Protium platform, including ... design, verification, integration, timing closure, documentation and releasing the IPs to end users; + Working on FPGA IP Design, Verification/Simulation, Timing closure, Validation of IP on the hardware; + Enhancing current IPs as well as developing new IPs.… more
    Cadence Design Systems, Inc. (07/09/25)
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