• Senior Front End Developer

    Abbott (Alameda, CA)
    …structured data implementation + Experience with internationalization (i18n) and right-to-left ( RTL ) layout support **Learn more about our health and wellness ... benefits, which provide the security to help you and your family live full lives:** www.abbottbenefits.com (http://www.abbottbenefits.com/pages/candidate.aspx) Follow your career aspirations to Abbott for diverse opportunities with a company that can help you… more
    Abbott (01/03/26)
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  • Sr. ASIC Design Verification Engineer - Lead,…

    Amazon (Sunnyvale, CA)
    …a state of the art verification environment to facilitate testing of the RTL against reference Matlab/C models . Develop detailed test plans and write tests, ... run regressions, collect coverage matrices and report progress to the program . Participate in the validation of ASIC implementations in Verilog/SystemVerilog . Run formal verification of complex blocks to ensure functional correctness . Work with the design… more
    Amazon (01/02/26)
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  • Lead Applications Engineer - DDR Design IP

    Cadence Design Systems, Inc. (San Jose, CA)
    …with simulation and synthesis tools . Strong knowledge of ASIC flow, RTL /Verilog . Individual leadership and initiative to manage pre-sales accounts . Excellent ... presentation skills and verbal/written communication skills is a must Nice to have : . Experience on memory subsystem verification and/or performance analysis . Knowledge of System Verilog and FPGA design . Knowledge of AXI, DFI and MIPI protocols . Working… more
    Cadence Design Systems, Inc. (01/02/26)
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  • Senior GPU Memory Architect

    NVIDIA (Santa Clara, CA)
    …+ Debug power, performance, and functional issues with high-level models, RTL simulation and emulation, silicon, and systems. + Collaborate with outside ... partners on system infrastructure. What we want to see: + 10+ yrs of experience in CPU/GPU architecture, memory systems design with a focus on energy efficiency in the system. + Bachelors in Electrical Engineering, Computer Science, or related field (or… more
    NVIDIA (01/01/26)
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  • Hardware Simulator SDE I, AWS Machine Learning…

    Amazon (Cupertino, CA)
    …or infrastructure components, testing, and debug - Work closely with architecture, RTL design, design verification, emulation, and software teams to build, debug, ... and deploy your models - Innovate on the tooling you provide to customers, making it easier for them to use our SoC models - Drive model and modeling infrastructure performance improvements to help our models scale - Develop software which can be maintained,… more
    Amazon (01/01/26)
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  • ASIC/SOC DFT Engineer (Silicon Engineering)

    SpaceX (Sunnyvale, CA)
    …RESPONSIBILITIES: + Responsible for evaluating design readiness for scan insertion through RTL and physical design Scan Design Rule Check (DRC) tools + Integration ... and verification of Design for Test (DFT) fabrics and IP within Subsystems + Running and evaluating scan insertion through synthesis tools and refining scan insertion recipe for maximum coverage + Run ATPG(Automatic Test Pattern Generation) analysis to ensure… more
    SpaceX (12/27/25)
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  • Physical Design and Methodology Lead

    Google (Sunnyvale, CA)
    …feasibility studies, develop timing, power and area design goals, and explore RTL /design tradeoffs for physical design closure. + Drive physical design methodologies ... and automation scripts for various implementation steps. + Perform technical evaluations of vendors, process nodes, IP, and provide recommendations. Information collected and processed as part of your Google Careers profile, and any job applications you choose… more
    Google (12/25/25)
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  • Digital Signal Processing Engineer

    Broadcom (San Jose, CA)
    …Exposure to Design for test, understanding of scan concept and writing DFT friendly RTL . + Experience in synthesis, CDC, static timing analysis. + Exposure to SDF ... annotated simulations with good understanding of parasitic delays. **Highly Desired Qualifications:** + Good understanding of high speed DSP applications and algorithms. + Prior experience of high speed ADC, FFE, DFE, CDR Adaptation algorithms for PAM4… more
    Broadcom (12/23/25)
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  • ASIC Engineer, Networking Architecture…

    Meta (Menlo Park, CA)
    …data center networking architecture, network system design, micro-architecture, RTL design, Design Verification, Firmware/Software development, Pre-Post silicon ... validation, and Program Management to deliver first-pass functional silicon. **Required Skills:** ASIC Engineer, Networking Architecture and Modeling Responsibilities: 1. Collaborate with architecture engineers to define specifications for one or more… more
    Meta (12/20/25)
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  • Silicon Architect, Reality Labs

    Meta (San Diego, CA)
    …consumer or mobile devices 13. Experience with developing tools to generate RTL 14. Experience with scripting languages like Python to facilitate task automation ... 15. Experience collaborating in a multi-site team environment **Public Compensation:** $146,000/year to $209,000/year + bonus + equity + benefits **Industry:** Internet **Equal Opportunity:** Meta is proud to be an Equal Employment Opportunity and Affirmative… more
    Meta (12/20/25)
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