- Meta (Sunnyvale, CA)
- …shift of software development 15. Experience with SystemVerilog and C++ to model RTL components and transactors 16. Experience with post-silicon bring up, debug, and ... reproducing issues on emulators 17. Experience with cadence (palladium/protium) and Synopsys (zebu) tools 18. Experience with scripting languages such as Python, Perl and TCL **Public Compensation:** $146,000/year to $209,000/year + bonus + equity + benefits… more
- NVIDIA (Santa Clara, CA)
- …modeling and simulation using Matlab/Simulink, Simplis, Spice, VerilogAMS, mixed-signal RTL +spice, s-parameters, etc. + Knowledge of associated power delivery ... networks. + Familiarity/experience with industry-standard design and EDA tools (Cadence Virtuoso, Allegro) and circuit simulation tools (HSpice, Spectre, Primesim, XA, etc) Ways to stand out from the crowd: + Experience modeling and simulating complex power… more
- Amazon (Cupertino, CA)
- …orgs, you'd be working side by side with infrastructure experts, hardware engineers, RTL engineers, scientists & architects. Our workforce spans the globe and is ... truly international, you'll find yourself working side by side with individuals from numerous countries. We take mentorship seriously, you can both expect senior mentorship and will be expected to mentor new and junior engineers. The pace is fast as we work on… more
- Google (Sunnyvale, CA)
- …an emphasis on computer architecture. + Experience in verifying digital logic at RTL using SystemVerilog for ASICs. + Experience in power aware verification, gate ... level simulations, and post silicon bring-up. + Experience with the full verification life cycle. + Familiarity with ASIC standard interfaces. **About the job** In this role, you'll work to shape the future of AI/ML hardware acceleration. You will have an… more
- NVIDIA (Santa Clara, CA)
- …Santa Clara, CA. What you'll be doing: + Build FPGA prototypes by making RTL FPGA-friendly, partitioning the design and taking it through synthesis and place and ... route. + Improve performance of the prototype, analyze timing and generate bit streams. + Bring up the design on FPGA prototyping platforms and indulge in problem solving. + Release the prototype to the customers and support them when they face problems. + You… more
- Amazon (Cupertino, CA)
- …technical issues and the codebase head-first * Work closely with architecture, RTL design, design verification, emulation, and software teams to build, debug, and ... deploy your models * Focus on customer needs and use-cases to improve our models' quality, delivery speed, and usefulness within AWS * Develop mechanisms and infrastructure to enable the team to build high quality, maintainable, well documented, modular, and… more
- Microsoft Corporation (Mountain View, CA)
- …subsystems + Experience with the use of formal verification methods + Experience in RTL design for FPGA or emulation + Experience in Assembly, startup code and ... linker scripts + Experience in developing makefiles for software development + Proficient in SystemVerilog, C/C++, and scripting languages such as Python, Ruby or Perl. + In depth knowledge of verification principles, testbenches, stimulus generation. +… more
- Cisco (San Francisco, CA)
- …description languages (HDLs), such as Verilog or VHDL. + Experience with RTL design and simulation tools (eg, Synopsys, Cadence, Mentor Graphics). + Exposure ... to scripting languages (eg, Python, Perl, TCL) for automation. + Familiarity with ASIC/SoC design flow including synthesis, place & route, and timing closure. **Preferred Qualifications** ** ** + Experience with ASIC verification methodologies (eg, UVM,… more
- Cisco (San Jose, CA)
- …DFT verification lead in San Jose, CA. You will work with Front-end RTL teams, backend physical design teams to understand chip architecture and drive high-quality ... DFT verification. **Key Essential Functions:** + Responsible for thorough test planning and development of test benches to verify comprehensive Design-for-Test (DFT) architecture that supports ATE screening, in-system test, debug and diagnostics needs of the… more
- NVIDIA (Santa Clara, CA)
- …have the opportunity to be responsible for the micro-architecture and design including RTL design, synthesis and timing analysis using innovative CAD tools and using ... the latest process technologies. What we need to see: + MS/Phd in Electrical Engineering or Computer Engineer or related degree (or equivalent experience). + 5+ years of relevant industry experience and a background in high-speed coherent interconnects,… more