• FPGA/ASIC Design Engineer (Silicon Engineering)

    SpaceX (Irvine, CA)
    …AND EXPERIENCE: + Experience designing digital ASICs and/or FPGAs + Experience writing RTL in Verilog or SystemVerilog + Experience in designing SoC, DSP, digital ... communication system datapath blocks, and/or modems + Experience and understanding of AXI/AHB/APB protocols + Experience with EDA tools such as HDL simulators (eg VCS, Questa, IES), HDL Lint tools (eg Spyglass) and FPGA tools (eg Xilinx Vivado, Altera Quartus… more
    SpaceX (06/12/25)
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  • Silicon Development Engineer, Frontend, PhD,…

    Google (Sunnyvale, CA)
    …in the design, verification, and validation of complex silicon systems, encompassing RTL coding, functional verification, and system integration. + Contribute to the ... development and improvement of electronic design automation (EDA) tool infrastructure and internal flows. + Collaborate with cross-functional teams to debug failures and translate research findings into practical silicon solutions. Google is proud to be an… more
    Google (06/10/25)
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  • Senior Synthesis Flow CAD Engineer

    NVIDIA (Santa Clara, CA)
    …with Machine Learning/Deep Learning + Experience in other ASIC methodologies such as RTL Lint, CDC, DFT or STA. + Experience with compute farm interaction: software ... deployment, performance optimization, containers, etc. NVIDIA is widely considered to be the leader of AI computing, and one of the technology world's most desirable employers. We have some of the most forward-thinking and talented people in the world working… more
    NVIDIA (06/10/25)
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  • Manager, Digital Design - Mixed-Signal High-Speed…

    NVIDIA (Santa Clara, CA)
    …+ Expertise in Verilog or SystemVerilog, logic design, and circuit modeling in RTL for mixed-signal blocks + Strong background in custom digital circuit design and ... adaptation algorithms (FFE, DFE, CTLE, CDR, offset cancellation), understanding of high-speed SerDes I/O digital design, with knowledge of protocols like Ethernet and PCIe + Experience with industry-standard verification methodologies, such as UVM +… more
    NVIDIA (06/10/25)
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  • Senior FPGA Prototyping Engineer - Hardware

    NVIDIA (Santa Clara, CA)
    …Santa Clara, CA. What you'll be doing: + Build FPGA prototypes by making RTL FPGA-friendly, partitioning the design and taking it through synthesis and place and ... route. + Improve performance of the prototype, analyze timing and generate bit streams. + Bring up the design on FPGA prototyping platforms and indulge in problem solving. + Release the prototype to the customers and support them when they face problems. + You… more
    NVIDIA (06/10/25)
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  • Physical Design Methodology Engineer

    quadric.io, Inc (Burlingame, CA)
    …process nodes. Responsibilities + Develop Quadric processor IP implementation scripts from RTL to GDS across multiple advanced process nodes. + Preform test chip ... tape outs as necessitated by architecture innovation. + Collaborate with the architecture team to optimize PPA. Requirements + MS or Ph.D. in Electrical Engineering with a minimum of eight years of CPU/GPU/ASIC implementation + Proficiency in TCL scripting +… more
    quadric.io, Inc (06/09/25)
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  • FPGA Engineer

    quadric.io, Inc (Burlingame, CA)
    …or equivalent toolchain + Experience with implementing flows to map CPU/GPU RTL on FPGA based platforms for emulation purposes Responsibilities + Develop flows ... to run HW verification tests, SDK tests and NNs on these platforms + Build regression environments to ensure flow evolves with HW and SW changes + Triage failures and do first order debug before handing issue to HW or SW team + Keep broader team informed about… more
    quadric.io, Inc (06/09/25)
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  • Senior Hardware Engineer - Micro-Architect

    quadric.io, Inc (Burlingame, CA)
    …processor architecture by understanding its applications + Own microarchitecture definition & RTL implementation of the processor in SystemC or SystemVerilog + Own ... Power, Performance & Area (PPA) optimization + Contribute to timing closure through full product cycle (front end, back-end, tapeout) Requirements: + BS/MS or Ph.D. in Electrical or Computer Engineering with a minimum of five years of CPU/GPU/ASIC front-end… more
    quadric.io, Inc (06/09/25)
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  • Sr. Silicon Validation Engineer, DVT Silicon Dev

    Amazon (San Diego, CA)
    …(PHY/MAC), power, performance, and reliability. * Collaborate closely with design, RTL verification, firmware, and systems teams to root-cause and resolve silicon ... issues. * Design and implement automated test setups, Python/Perl/C-based test scripts, and data collection/analysis tools. * Validate interfaces such as DDR, PCIe, USB, MIPI, Ethernet, and wireless standards (eg, LTE, NR). * Work with lab instruments (eg,… more
    Amazon (06/08/25)
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  • Senior GPU Architect

    NVIDIA (Santa Clara, CA)
    …graphics or parallel processing architectures + Be hungry to learn and work on simulators, RTL and real silicon. What we need to see: + MS in Computer Science, ... Electrical Engineering or Computer Engineering or equivalent experience. + 8+ years of relevant industry experience in GPU or CPU architecture (or other equivalent experience). + Strong programming ability in C, C++, Perl and Python. + Background in computer… more
    NVIDIA (06/03/25)
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