- Micron Technology, Inc. (San Jose, CA)
- …language; 2. Digital logic fundamentals, including digital logic design and RTL ; 3. Analog circuits; 4. Mixed-mode design and validation; 5. Design/Verification ... CAD tools, including NCSim. 6. Design Compiler, Formality, or PrimeTime; 7. TCL, PERL, C/C++ or Python; 8. Nand Memory Design. The US base salary range that Micron Technology, Inc. estimates it could pay for this full-time position is $148,869.22 - $197,500… more
- Applied Materials (Santa Clara, CA)
- …conference and journal publications + Experience with standard cell characterization, RTL synthesis, DRC/LVS and place-and-route and timing analysis flows + ... Experience in calibration to hardware/measurements and correlations **Additional Information** **Time Type:** Full time **Employee Type:** Assignee / Regular **Travel:** Yes, 10% of the Time **Relocation Eligible:** No The salary offered to a selected… more
- NVIDIA (Santa Clara, CA)
- …of ASIC/SoC design, verification, bring-up, and productization flows ( RTL -to-release). + Experience scripting or automating workflows (Python preferred). ... + Strong communication and organizational abilities; flourishes in fast-paced, multi-functional atmospheres. Ways to Stand Out from the crowd: + Background in DFX, DFT, or datacenter-class silicon testability. + Experience with EDA tool data analytics, APIs,… more
- NVIDIA (Santa Clara, CA)
- …and prototyping breakthrough Test Architectures for reticle sized, multi-chiplet products-from RTL to verification to post-silicon ATE bring-up. Join a globally ... recognized team that consistently delivers breakthrough performance across multiple high-impact tape-outs each year. What you'll be doing: + Develop and deploy Industry-leading test methodologies on NVIDIA's next-generation silicon platforms. + Collaborate… more
- NVIDIA (Santa Clara, CA)
- …the future direction of the methodology for the testbench + Partner closely with RTL and architecture teams to help refine the microarchitecture plans to ensure that ... changes to the design are verifiable + Architect and plan the verification strategy and execution for sub-system features impacting your unit + Support post-silicon validation activities + Harness cutting-edge AI to accelerate testbench development, task… more