- Palo Alto Networks (Santa Clara, CA)
- …+ **Write** clear design and micro-architecture specifications. + **Design** SystemVerilog RTL that meets area, performance, and power targets. + **Verify** your ... features. + **Partner** with physical-design teams: review synthesis/timing reports, rewrite RTL to close critical paths, and consult on floor-planning for… more
- Amazon (Sunnyvale, CA)
- …multiple disciplines * Develop detailed design specifications and documentation * Perform RTL coding and synthesis * Work with Partners/Suppliers to optimize and ... plan and coverage reviews The ideal candidate should have experience with RTL development environments and fluency in modern hardware description languages. They… more
- BrainChip, Inc. (Laguna Hills, CA)
- …Specification, develop a feasible micro architecture, implement the function using RTL language, verify the functionality, and follow up until completion of ... gather the relevant information, and develop a solution. Use RTL language to design the digital functional modules. Program,...tools to check the functionalities of the designs in RTL and gate level. Collaborate with other team members… more
- NVIDIA (Santa Clara, CA)
- …and Ease of timing closure to innovate and implement new Clocking topologies in RTL . + Collaborate with Physical design and timing team to evaluate Clocking concerns ... + Together with other team members, we deliver clock RTL information to GPU, CPU and SOC verification team,...ability to collaborate with multiple teams. + Experience in RTL design (Verilog), verification and logic synthesis. + Strong… more
- Insight Global (Saratoga, CA)
- …providing strategic direction and implementation in the following areas: * Own FPGA RTL development from blank sheet to flight. * Develop FPGA logical architecture ... HW/SW interfaces between fabric logic and processing subsystems. * Develop FPGA RTL code for Microsemi FPGAs and other manufacturer SoCs in either SystemVerilog… more
- Cisco (San Jose, CA)
- …fullchip timing in multiple timing modes. + Option to also do block level RTL design or block or top-level IP integration. + Helping develop efficient methodology to ... cycle. + Reviewing block level SDCs and clocking diagrams and mentor other RTL design owners on SDC development. + Creating fullchip clocking diagrams and related… more
- Amazon (Cupertino, CA)
- …the right trade-offs. Key job responsibilities - Work with RTL /logic designers to drive architectural feasibility studies, explore power-performance-area tradeoffs ... other physical design engineers as well as with the RTL /Arch. teams About the team Inclusive Team Culture Here...- 6+ years in ASIC Physical Design from - RTL -to-GDSII in either 7nm, 14/16nm, 20nm, or 28nm -… more
- NVIDIA (Santa Clara, CA)
- …the power and performance of NVIDIA's next generation GPUs + Partner with RTL and Design Verification engineers to ensure delivery meets performance and quality ... digital IPs. + Craft and develop behavioral models in RTL for mixed-signal blocks. What we need to see:...understanding of physical design and VLSI + Experience with RTL development, Custom Digital Design, and Behavioral Circuit Modeling… more
- Micron Technology, Inc. (Folsom, CA)
- …inspiring the world to learn, communicate and advance faster than ever. A HBM RTL designer will need to have significant experience front end digital design! The ... validation. **Responsibilities** + Define requirements, develop specifications, and architect RTL blocks for HBM products. + Own circuit development, simulations,… more
- Teledyne (Milpitas, CA)
- …with cross-functional teams to deliver industry-leading solutions. **Key Responsibilities** + ** RTL Design & Microarchitecture** + Develop synthesizable RTL ... in digital logic design for FPGA or ASIC. + Strong proficiency in **Verilog/SystemVerilog RTL design** . + Experience with one or more of the following protocols:… more