- NVIDIA (Santa Clara, CA)
- …run, and debug tests on Architecture models. Support test debug on RTL , emulation, and silicon. + Run simulations to analyze Architectural Vulnerability Factor ... various fault types (eg, transient faults, stuck-at faults) in gate-level netlist, RTL , architectural model, silicon and other environments. What we need to see:… more
- NVIDIA (Santa Clara, CA)
- …and Ease of timing closure to innovate and implement new Clocking topologies in RTL . + Collaborate with Physical design and timing team to evaluate Clocking concerns ... + Together with other team members, we deliver clock RTL information to GPU, CPU and SOC verification team,...ability to collaborate with multiple teams. + Experience in RTL design (Verilog), verification and logic synthesis. + Strong… more
- NVIDIA (Santa Clara, CA)
- …3+ years, or PhD with 2+ years of experience in DFT, system architecture, or RTL design. + Understanding of fundamental DFT topics, such as, fault modeling, ATPG and ... and dielet/chiplet based designs, and UCIe protocol. + Good understanding of RTL coding principles. + Knowledge of high-speed interface architectures such as PCIe,… more
- NVIDIA (Santa Clara, CA)
- …+ You'll drive the design and physical implementation of custom digital IPs from RTL to layout using industry standard tools and custom design flows. + Collaborate ... power circuits (power gating, decaps, multi-vt, etc..) is a plus. + Experience with RTL , logic synthesis and verification is a plus. + Mixed signal circuit design… more
- SpaceX (Hawthorne, CA)
- …including modem performance + Support FPGA designers with bit-accurate and cycle-accurate RTL verification + Own the end-to-end results of your products, from ... using the Xilinx toolchain + Experience with verification between simulation and RTL FPGA implementation + Experience modeling RF and channel impairments such as… more
- Google (Sunnyvale, CA)
- …experience in logic design, digital ASIC, or SoC design. + Experience with RTL (Register Transfer Level) design using Verilog or SystemVerilog. + Experience with ... optimization techniques. + Define best practices and methodologies to achieve low-power RTL designs. + Collaborate with cross-functional software and system teams to… more
- NVIDIA (Santa Clara, CA)
- …measurement, Reset and Boot controllers. + You will be responsible for the RTL design, logic synthesis, and timing analysis of several modules. + Integrate modules ... Reset or Chip Boot + Solid frontend ASIC design skills, including RTL design, asynchronous and synchronous Reset design, synthesis, timing analysis, and… more
- Broadcom (Irvine, CA)
- …+ HDL coding, equivalency checking, STA result review, CDC checks, Lint checks, RTL /gate level simulations & silicon debugging + scripting for various IC design ... solving skills as well as hands-on lab debugging experiences + Good knowledge of RTL simulation and synthesis. + In-depth knowledge for design for low power and… more
- Microsoft Corporation (Mountain View, CA)
- …on Intellectual Property (IP) microarchitecture specification, Register Transfer Level ( RTL ) design, synthesis/Lint/CDC/FEV and System on Chip (SOC) integration on ... 5+ years expertise in Digital Design including microarchitecture specification development, RTL coding in Verilog/System Verilog and Clock Domain Crossing (CDC)/Lint… more
- Google (Sunnyvale, CA)
- …As a Physical Design Engineer, you will collaborate with Register-Transfer Level ( RTL ), Design for Testing (DFT), floorplan, and full-chip sign off teams. ... blocks from Register-Transfer Level-to-Graphic Design System (RTL2GDSII). + Collaborate with RTL /Design and Product Development teams to achieve the best Power… more