- Amazon (Sunnyvale, CA)
- …As a Physical Design Engineer, you will: - Work with RTL /logic designers to drive architectural feasibility studies, explore power-performance-area tradeoffs for ... other physical design engineers as well as with the RTL /Arch. Teams Basic Qualifications - BS in EE/CS -...EE/CS - 7+ years in ASIC Physical Design from RTL -to-GDSII in FINFET technologies such as 5nm/7nm, 14/16nm -… more
- Amazon (Cupertino, CA)
- …the right trade-offs. Key job responsibilities - Work with RTL /logic designers to drive architectural feasibility studies, explore power-performance-area tradeoffs ... other physical design engineers as well as with the RTL /Arch. teams About the team Inclusive Team Culture Here...- 6+ years in ASIC Physical Design from - RTL -to-GDSII in either 7nm, 14/16nm, 20nm, or 28nm -… more
- Micron Technology, Inc. (Folsom, CA)
- …learn, communicate and advance faster than ever. **What's Encouraged Daily:** A HBM RTL designer will need to have significant experience front end digital design! ... in digital design + Strong fundamental knowledge of digital design and RTL development + Good understanding on timing/area/power/complexity tradeoffs in designs +… more
- SpaceX (Irvine, CA)
- …performance requirements and system limitations + Define micro-architecture, implement the RTL in Verilog/System Verilog, integrate that in top level and deliver ... computer engineering, or computer science + 5+ years of experience in RTL implementation PREFERRED SKILLS AND EXPERIENCE: + Ability to solve complex problems… more
- SpaceX (Hawthorne, CA)
- …SpaceX satellite spacecraft + Implement logic designs and signals processing algorithms in RTL + Integrate designs onto FPGA/SoC platforms + Bring up and validate ... digital designs + Experience in different stages of FPGA development: RTL design, verification, synthesis, timing analysis, lab bring up/validation + Experience… more
- NVIDIA (Santa Clara, CA)
- …(eg, DDR, PCIe, LPDDR) and clock/data alignment constraints. + Work closely with RTL and PD teams to extract clocking intent and drive accurate constraint generation ... from RTL and interface specifications. + Create structural and timing checks for clock signal crossings across hierarchy, including isolation and level shifter… more
- Arrow Electronics (San Jose, CA)
- …HQ's in AMER-West + Depth of experience w/ ASIC, Silicon, IP, EDA, RTL to GDS, Verification & Validation, Physical Design, Test, DFT Engineering Solutions, Turnkey, ... experience with IP / design service companies and successful track record w/ Turnkey / RTL to GDS / Spec to Silicon + Demonstrable experience solutioning ASIC | SOC… more
- NVIDIA (Santa Clara, CA)
- …for building energy models that integrate into architectural simulators, RTL simulation, emulation and silicon platforms. Key responsibilities include developing ... to debug energy inefficiencies observed in various workloads run on silicon, RTL , and architectural simulators. Identify and suggest solutions to fix the energy… more
- Microsoft Corporation (Santa Clara, CA)
- …silicon team in Santa Clara, you'll take on all aspects of Physical Design from RTL to GDS signoff. You'll tackle key design challenges and work closely with other ... and manufacturing requirements: + Perform early design exploration & analysis, giving feedback to RTL team on design issues, and work to resolve them + Resolve all… more
- Arrow Electronics (San Jose, CA)
- …and supporting our prototyping methodology. + **Option to engage in block-level RTL design or block or top-level IP integration.** + Collaborate with Software, ... Domain Crossing (CDC), Reset Domain Crossing (RDC).** + Demonstrated experience in ** RTL coding using Verilog/System Verilog and integration of third-party IPs.** +… more
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