- The Boeing Company (El Segundo, CA)
- …to configure, instantiate, and validate interconnect switches. + Solid grounding in RTL design flows, IP integration, and timing closure concepts. + Ability to ... create software-driven test plans for SoC validation: boot validation, memory stress tests, peripheral functional tests, and power/clock domain isolation checks. + Excellent problem-solving aptitude and the ability to communicate complex technical concepts to… more
- Actalent (Goleta, CA)
- …design decisions to develop and simulate portions of the video pipeline RTL . Additional Responsibilities: . Port algorithms developed in Matlab to various embedded ... platforms (FPGAs and SOCs) . Adapt algorithms to meet embedded system requirements conforming to their target platform constraints . Optimize new and existing embedded algorithms to efficiently use the available resources . Analyze requirements and… more
- Google (Sunnyvale, CA)
- …+ 8 years of experience with industry-standard EDA tools for RTL simulation, synthesis, and static timing analysis. **Preferred qualifications:** + Experience ... with design for testability (DFT) concepts and methodologies (scan, JTAG, MBIST). + Experience with embedded processors (eg, ARM, RISC-V) and associated peripherals. + Experience in UVM/OVM or other advanced verification methodologies. + Knowledge of low-power… more
- Amazon (San Diego, CA)
- …through the various design phases of Silicon development from architecture definition, RTL design, Verification, IP design, Physical design, silicon bring up, test, ... characterization, quality, reliability and post silicon management. About the team Basic Qualifications 3+ years of ASIC technical development leadership or ASIC program management experience 2+ years experience working directly with ASIC, embedded SW,… more
- SpaceX (Hawthorne, CA)
- …digital designs + Experience in different stages of FPGA development: RTL design, verification, synthesis, timing analysis, lab bring up/validation + Experience ... developing firmware for Xilinx SoC FPGA platforms and designing high-throughput PS/PL interfaces + Experience with high speed serial links, including GbE, PCI-E or similar + Experience with networking protocols and packet processing (Ethernet 802.3, IPV4/IPV4,… more
- SpaceX (Sunnyvale, CA)
- …results + Experience with scripting languages, eg Python for automation + RTL design, chip bring-up, and post-silicon validation experience + Ability to work ... in a dynamic environment with changing needs and requirements ADDITIONAL REQUIREMENTS: + Must be willing to work extended hours and weekends as needed COMPENSATION & BENEFITS: Pay range: Design Verification Engineer /Senior: $170,000.00 - $230,000.00/per year… more
- NVIDIA (Santa Clara, CA)
- …the future direction of the methodology for the testbench + Partner closely with RTL and architecture teams to help refine the microarchitecture plans to ensure that ... changes to the design are verifiable + Architect and plan the verification strategy and execution for sub-system features impacting your unit + Support post-silicon validation activities What we need to see: + Currently pursuing or recently completed a BS or… more
- NVIDIA (Santa Clara, CA)
- …incremental scan insertion, power hookup, placement, timing optimization, etc. + Educate RTL teams on best practices that you identify and advance. + Help ... develop GUIs for design visualization and other tools to boost designer productivity + Over time, this role can expand to other areas of physical design implementation and analysis tools + As with any software engineering team, we do write a lot of code, but… more
- ManpowerGroup (Mountain View, CA)
- …a UVM verification environment including agents and scoreboards. + Run tests on RTL and Gate Level Netlists, debug failures to root cause, and recommend fixes. ... + Collaborate with cross-functional teams to ensure thorough verification coverage. **What's Needed?** + Bachelor's or Master's degree in Electrical Engineering, Computer Engineering, or a related field. + 5+ years of experience in silicon verification, with a… more
- Kelly Services (Folsom, CA)
- …and integration across multiple components + Role involves design engineering, not heavy RTL coding + Candidate should be able to extract technical details and build ... high-level architectural models + Responsible for reset flow, clock domain crossing, and power domain management + Needs to guide and analyze full data-path performance across blocks + Must be able to pivot and adapt based on evolving capabilities or design… more