- Broadcom (Fort Collins, CO)
- …+ Have an understanding of the ASIC design flow including FET design, RTL , synthesis, timing, floorplanning, power planning, P&R, LVS, DRC, + Basic understanding of ... with the Cadence Virtuoso design environment + Experience or coursework with RTL languages (ie SystemVerilog, Verilog, VHDL) + Experience scripting in Skill, TCL,… more
- General Atomics (Englewood, CO)
- …and control systems. + Develop and optimize FPGA architectures, including RTL (Register Transfer Level) coding, simulation, synthesis, and timing analysis. + ... lieu of education. **Required Experience:** + Expertise in FPGA design, including RTL coding (eg, Verilog, VHDL) and development for high-speed data processing… more
- Northrop Grumman (Aurora, CO)
- …with ASIC development process. + Knowledgeable in VHDL, Verilog or SystemVerilog RTL coding and be highly proficient in DFT methodologies. + Responsible for ... operating in a team environment and collaborate across the different teams as required to accomplish the goals. **Principal Engineer Basic Qualifications:** + Bachelor's degree with 5 years of experience, a Master's degree with 3 years of experience or a Ph.D.… more
- Broadcom (Fort Collins, CO)
- …good engineering judgement. **Ideally you are also experienced in:** + Semiconductor RTL to OASIS techniques + Semiconductor Static Timing Analysis + Design ... Automation and Flows development + Linux **Additional Job Description:** **Compensation and Benefits** The annual base salary range for this position is $127,100 - $203,400. This position is also eligible for a discretionary annual bonus in accordance with… more
- Broadcom (Fort Collins, CO)
- …planning, pin placement, and feedthrough optimization. + Collaborate closely with RTL , timing, and packaging teams to balance performance, power, and area ... (PPA) targets. + Lead top-level timing closure, congestion analysis, and ECO implementation to ensure clean tapeout readiness. + Coordinate with block owners and integration teams for smooth block-level to top-level convergence. + Support cross-functional… more
- Broadcom (Fort Collins, CO)
- …SERDES communications protocols. + Logic design, chip architecture, microarchitecture, Verilog RTL coding Front-end logic design verification, DRC, logic synthesis + ... Knowledge of DFT methods including scan, memory BIST and repair **Education and Experience required:** + Bachelor's in Electrical Engineering and 12 + years of related experience or a Master's degree in Electrical Engineering and 10+ years of related… more