- Microsoft Corporation (Santa Clara, CA)
- …next stage in your career. **Responsibilities** + Own the micro-architecture specification and RTL development of design modules for ASIC memory subsystem. + ... Systems & Infrastructure group is seeking a Senior Silicon Engineer . You will join our front-end silicon team and...on verification plans and methodology. + Collaborate with Physical design teams to ensure design meets timing… more
- NVIDIA (Santa Clara, CA)
- …in Santa Clara, CA. What you'll be doing: + Build FPGA prototypes by making RTL FPGA-friendly, partitioning the design and taking it through synthesis and place ... timing and generate bit streams. + Bring up the design on FPGA prototyping platforms and indulge in problem...face problems. + You are expected to understand the design and implementation, define the configurations, develop/modify the bringup… more
- Cisco (San Jose, CA)
- …evolving, and supporting our prototyping methodology + Option to engage in block-level RTL design or block or top-level IP integration + Collaborate with ... Technical Leader ASIC Design - Prototyping Apply (https://jobs.cisco.com/jobs/Login?projectId=1439389) + Location:San Jose,...leveraging the latest technology. We're seeking a talented ASIC engineer with a focus on FPGA Prototyping and a… more
- Meta (Menlo Park, CA)
- …the architecture team 2. Collaborate with cross functional teams working on RTL design , Design Verification, Firmware/Software development, Pre-Post silicon ... **Summary:** As an ASIC Engineer on the Hardware Testing Infrastructure team at...needed to excel in their roles. **Required Skills:** ASIC Engineer , Architecture Infrastructure Responsibilities: 1. Communicate your architectural solutions… more
- Google (Sunnyvale, CA)
- …define security requirements for hardware products entering Google's data centers. + Design and engineer the necessary security controls for identified threats ... 2 years of experience in silicon life-cycle or hardware design life-cycle. + 2 years of experience with security...environment for Google's users and developers. As a Security Engineer , you help protect network boundaries, keep computer systems… more
- Cisco (San Jose, CA)
- …most complex ASICs being developed in the industry. You will work with front-end RTL Design and Verification teams and Architects to understand chip architecture ... ASIC Verification Engineer Apply (https://jobs.cisco.com/jobs/Login?projectId=1431425) + Location:San Jose, California, US + Area of InterestEngineer - Hardware +… more
- NVIDIA (Santa Clara, CA)
- …Power Engineer ! NVIDIA is seeking extraordinary power engineers to design hardware accelerators and processors on our next-generation mobile, embedded and ... and deliver fully verified, high performance, area and power efficient RTL to achieve design targets + You will be working with architects, designers,… more
- NVIDIA (CA)
- …of Circuit, Signal Integrity, RTL , Place and Route, substrate layout and system design Engineers and Managers. + Work to define a chip floor plan, pad ring, ... We are now looking for a Senior Packaging Technical Engineer . NVIDIA has continuously reinvented itself over two decades. Our invention of the GPU in 1999 sparked… more
- NVIDIA (Santa Clara, CA)
- NVIDIA is seeking best-in-class ASIC Verification Engineer to verify the world's leading GPUs. In this role, you will be doing unit level verification of the process ... working across many NVIDIA teams from software, to architecture, design , methodology, and more. The GPU is used in...the methodology for the testbench + Partner closely with RTL and architecture teams to help refine the microarchitecture… more
- Cisco (San Jose, CA)
- …close fullchip timing in multiple timing modes. + Option to also do block level RTL design or block or top-level IP integration. + Helping develop efficient ... first customer shipments **Your Impact** You are a diligent Design /SDC Engineer with strong analytical skills and...block level SDCs and clocking diagrams and mentor other RTL design owners on SDC development. +… more