- Meta (Sunnyvale, CA)
- … and point out lower power and higher performance trade-offs 5. Interface with the RTL design team to drive design modifications to resolve congestion/timing ... We are looking for individuals with experience in physical design from RTL to GDSII in low...and IP for data center applications. **Required Skills:** ASIC Engineer , Physical Design Responsibilities: 1. Develop and… more
- Amazon (Cupertino, CA)
- … quality and making the right trade-offs. Key job responsibilities As an ASIC Design Engineer , you will: * Develop and implement high-performance, area and ... Machine Learning Acceleration team you'll be responsible for the design and optimization of hardware in our data centers...power-efficient RTL designs to meet project specifications and targets *… more
- Broadcom (San Jose, CA)
- …Account, please Sign-In before you apply.** **Job Description:** **Job Description: IC Design Engineer ** + Participate in IP level architectural definition ... including micro-architecture definition + Perform RTL design using Verilog HDL, with an emphasis on performance and area + Implement multi-power and low-power… more
- Arrow Electronics (San Jose, CA)
- **Position:** Senior ASIC Design Engineer (eInfochips Inc) **Job Description:** **What candidate will Be Doing:** + Map multi-million gate SoC designs onto ... and supporting our prototyping methodology. + **Option to engage in block-level RTL design or block or top-level IP integration.** + Collaborate with Software, … more
- NVIDIA (Santa Clara, CA)
- …you can make a lasting impact on the world. Join NVIDIA as a Senior SoC Design Engineer developing innovative SoC solutions. What you'll be doing: + Work in ... compute, fabric, memory, and attached devices. + Strong background in RTL design developing high-speed digital blocks. + Experience in negotiating solutions… more
- Teledyne (Milpitas, CA)
- …factory automation, air and water quality environmental monitoring, electronics design and development, oceanographic research, deepwater oil and gas exploration ... of being on a team that wins. **Job Description** Design and test FPGA circuitry for next generation Test...test with test hardware + Work with the verification engineer to validate your circuit in a whole chip… more
- NVIDIA (Santa Clara, CA)
- …logic analyzers and/or other silicon visibility tools. + Great understanding of ASIC design flow including RTL design , verification, logic synthesis, timing ... looking for a Senior Design for Debug (DFD) Architect and Methodology Engineer ! NVIDIA is seeking a DFD Architect to implement hardware and software solutions to… more
- Meta (Sunnyvale, CA)
- …learning, video transcoding and network acceleration. **Required Skills:** ASIC Engineer , Design Responsibilities: 1. Architecture exploration 2. ... and data path IPs OR Experience in SoC Micro-architecture, Design and Integration 7. RTL development using...in SoC Micro-architecture, Design and Integration 7. RTL development using Verilog, System Verilog and HLS **Preferred… more
- Meta (Sunnyvale, CA)
- …SoC and IP for data center applications. **Required Skills:** ASIC Engineer , Design Responsibilities: 1. Architecture exploration 2. Micro-architecture ... **Summary:** Meta is hiring ASIC Design Engineers within our Infrastructure organization to build...development 3. RTL development using Verilog, System Verilog and HLS 4.… more
- Broadcom (San Jose, CA)
- …will involve in engineering implementation spec writing from marketing/system requirements, RTL design and verification, synthesis, static timing analysis. You ... system design tradeoffs for high volume applications. Must have good RTL experience including specification, design , verification, and synthesis. Must have… more