- Meta (Sunnyvale, CA)
- …"Apply to Job" online on this web page. **Required Skills:** ASIC Design Engineer Responsibilities: 1. Responsible for micro-architecture development. 2. Perform ... RTL development using Verilog, System Verilog and/or HLS. 3....debugging. 5. Collaborate with implementation team to close the design on timing and power. **Minimum Qualifications:** Minimum Qualifications:… more
- SpaceX (Sunnyvale, CA)
- Physical Design Engineer (Silicon Engineering) Sunnyvale, CA Apply SpaceX was founded under the belief that a future where humanity is out exploring the stars is ... ultimate goal of enabling human life on Mars. PHYSICAL DESIGN ENGINEER (SILICON ENGINEERING) At SpaceX we're...drive architectural feasibility studies, develop timing, power and area design targets, and explore RTL / design … more
- Broadcom (Irvine, CA)
- …apply.** **Job Description:** + This opening work on chip design which enables 10Gbps/40Gbps/100Gbps/400Gbps backplane/cable/optical fiber communication and 5G ... transciever + prepare detailed design document + HDL coding, equivalency checking, STA result...equivalency checking, STA result review, CDC checks, Lint checks, RTL /gate level simulations & silicon debugging + scripting for… more
- SpaceX (Irvine, CA)
- …analyzing results + Experience with scripting languages, eg Python for automation + RTL design , chip bring-up, and post-silicon validation experience + Ability ... Design Verification Engineer (Silicon Engineering) Irvine, CA Apply SpaceX was founded under the belief that a future where humanity is out exploring the stars… more
- SpaceX (Sunnyvale, CA)
- …hours and weekends as needed COMPENSATION AND BENEFITS: Pay range: Physical Design Engineer /Senior: $170,000.00 - $230,000.00/per year Your actual level and ... Sr. SOC/ASIC Physical Design Methodology/CAD Engineer (Silicon Engineering) Sunnyvale,...project tracking and visualizing results/stats + Interface directly with RTL , physical design , package design ,… more
- Meta (San Diego, CA)
- **Summary:** As a Digital Design Engineer at Meta Reality Labs, you will work with a world-class group of researchers and engineers, and use your digital ... our industry leading virtual and augmented reality systems. **Required Skills:** Digital Design Engineer Responsibilities: 1. Responsible for top-level or block… more
- NVIDIA (Santa Clara, CA)
- NVIDIA is looking for an ASIC Design Engineer to join our Memory Subsystem Team! As an ASIC Design engineer at NVIDIA, you'll join a group of ... the opportunity to be responsible for the micro-architecture and design including RTL design , synthesis...to see: + MS/Phd in Electrical Engineering or Computer Engineer or related degree (or equivalent experience). + 3+… more
- ManpowerGroup (Mountain View, CA)
- Our client, a leader in silicon design , is seeking a Senior Hardware Design Engineer - SoC Integration to join their team. As a Senior Hardware Design ... align successfully in the organization. **Job Title:** Senior Hardware Design Engineer - SoC Integration **Location:** Mountain...to 50% of daily tasks. + Develop and implement RTL designs using SystemVerilog for digital IPs. + Perform… more
- Broadcom (San Jose, CA)
- …line interfaces and protocols.. You will be responsible for the micro-architecture, design , RTL coding, debugging and synthesis of complex functional blocks ... leading network switch products. Responsibilities include: + High quality micro-architecture and design specifications + Verilog RTL coding and synthesis +… more
- Amazon (Sunnyvale, CA)
- …performance, and area for significant IPs early in design cycle -Execute on design specifications to deliver high quality RTL -Ensure quality by running and ... tracking results of front-end tools including: Synthesis, Lint ( RTL , DFT, UPF), Power Analysis and STA -Take the...to volume production -Hands on experience in low power design techniques -Strong written and verbal skills Preferred Qualifications… more