• Senior Design Verification Engineer

    Microsoft Corporation (Mountain View, CA)
    …manage and optimize the Cloud infrastructure. We are looking for a **Senior Design Verification Engineer ** to join the team. **Responsibilities** + Establish ... yourself as an integral member of a design verification team for the development of AI components...Advanced eXtensible Interface (AXI) protocols. + Background in debugging RTL (Verilog) designs as well as simulation and/or emulation… more
    Microsoft Corporation (08/08/25)
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  • Senior Design Verification Engineer

    Amazon (Sunnyvale, CA)
    …tablets, Fire TV and Amazon Echo. What will you help us create? As a Sr. Design Verification Engineer at Amazon, you will be part of an advanced engineering and ... hardware for devices. The ideal candidate should have experience with RTL development environments, fluency in modern hardware description languages and verification… more
    Amazon (06/25/25)
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  • Senior Timing and Constraints Methodology…

    NVIDIA (Santa Clara, CA)
    …(eg, valid crossing of clock domains across hierarchical boundaries). + Collaborate with RTL , physical design , and verification teams to drive consistency and ... We are seeking an innovative senior timing signoff and constraint methodology engineer to develop pioneering timing sign-off strategies for next-generation GPUs and… more
    NVIDIA (05/29/25)
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  • Staff Software Engineer , TPU Performance,…

    Google (Sunnyvale, CA)
    …direction. + Experience with hardware (eg, how chips are built, RTL /VHDL/Verilog, interfaces (PCIe, Ethernet)). + Experience with ML Accelerators and simulators, ... all areas, including information retrieval, distributed computing, large-scale system design , networking and data storage, security, artificial intelligence, natural… more
    Google (08/08/25)
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  • Senior Design Verification Engineer

    Microsoft Corporation (Mountain View, CA)
    … for embedded systems + Experience with hardware emulation or FPGAs + Experience in RTL design for FPGA or emulation + Experience in Assembly, start up code ... optimize the Cloud infrastructure. We are looking for a **Senior Design Verification Engineer ** . **Responsibilities** + Develop Test Plans and review with… more
    Microsoft Corporation (08/08/25)
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  • ASIC Design Engineer

    Cisco (San Jose, CA)
    ASIC Design Engineer Apply (https://jobs.cisco.com/jobs/Login?projectId=1441220) + Location:San Jose, California, US + Area of InterestEngineer - Hardware + ... hardware platforms for Cisco's core Switching, Routing, and Wireless products. We design the networking hardware for Enterprises and Service Providers of various… more
    Cisco (06/25/25)
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  • ASIC Physical Design Engineer

    Amazon (Cupertino, CA)
    …analysis, and physical verification * Write Tcl or PERL scripts to improve physical design flows and methods * Collaborate with RTL , DFT designers to ensure ... Annapurna Labs we are at the forefront of hardware co- design not just in Amazon Web Services (AWS) but...while also being deeply important to our customers. We design and build every component of our hardware and… more
    Amazon (06/17/25)
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  • IC Physical Design Flow, Principal…

    Cadence Design Systems, Inc. (San Jose, CA)
    …& Route (Innovus, ICC2, Fusion Compiler) + Exposure and experience with Synthesis (Genus, RTL Compiler, Design Compiler) + Experience with EDA tools in the IC ... + Provide technical support to Cadence customers in the areas of Digital Design Implementation & Signoff including Synthesis, Place and Route, Design Closure,… more
    Cadence Design Systems, Inc. (07/18/25)
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  • Physical Design , Sr Principal Application…

    Cadence Design Systems, Inc. (San Jose, CA)
    …Principal Application Engineering (AE) - a blend of pre-sales, post-sales and design convergence in the netlist-GDS product space focusing on digital implementation ... technologies in Synthesis, P&R, and Signoff to meet/exceed their PPA targets, achieve faster design closure, and turn design concepts into reality. You will also… more
    Cadence Design Systems, Inc. (05/28/25)
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  • Staff Silicon Engineer , IP Design

    Google (Mountain View, CA)
    …development (eg, research, algorithm development, digital and physical design , implementation, verification, bring-up and post-silicon maintenance). + Experience ... in ASIC hardware architecture and silicon design . + Experience in coding with C or C++,...languages, such as Perl or Python. + Experience in RTL coding using Verilog or SystemVerilog. **Preferred qualifications:** +… more
    Google (08/08/25)
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