- Amazon (Austin, TX)
- Description Annapurna Labs is at the forefront of hardware/software co- design , not just in Amazon Web Services (AWS) but across the industry. We design and build ... Annapurna is a fantastic choice. We are seeking an experienced CPLD/FPGA Firmware Engineer to join our ML Acceleration Server Firmware team, which is responsible for… more
- IBM (Houston, TX)
- …in various aspects of the development, test, and support process, such as: * Logic ( RTL ) design and verification, physical design , and analog/IO design ... a job - it's a calling: To build. To design . To code. To consult. To think along with...Microelectronics packaging * Materials analysis and characterization * Mechanical design , modeling and technology integration * Circuit design… more
- Micron Technology, Inc. (Richardson, TX)
- …in the industry! **Position Overview:** We are searching for a Principal HBM IO Architecture Design engineer own the development of the PHY IO on the interface ... position, you will be responsible for the development including defining design target, developing spec, architecting IO/clocking/datapath, being responsible for … more
- Amazon (Austin, TX)
- …of maintainable, documented and well tested software - Close collaboration with RTL designers, design verification engineers, and other software teams - ... Description Annapurna Labs stands at the forefront of hardware/software co- design , leading innovation not just within Amazon Web Services (AWS) but across the entire… more
- IBM (Austin, TX)
- …a great fit for our team. **Your role and responsibilities** As a Test Design Engineer , you will be responsible for architecting and implementing DFT strategies ... for complex SoC designs using Synopsys toolsets. You will collaborate closely with RTL designers, verification engineers, and physical design teams to ensure… more
- Texas Instruments (Dallas, TX)
- …in **architecting mixed-signal chips** , **partitioning digital and analog design blocks** to optimize functionality and performance, especially for **high-speed ... and data paths** , and to **drive best-practices in Design for Verification and Design for Test.**...model, simple logical model, Verilog-AMS electrical or wreal model, RTL , Gates/SDF, etc.). + Define block handoff requirements and… more
- Meta (Austin, TX)
- …integrating SoCs or complex IP-based subsystems as a Silicon Architect or Digital Design Engineer 7. Experience in evaluating trade-offs such as speed, ... cross-functionally with SoC and IP architecture, performance/power modeling, logic design and verification, physical implementation, firmware, CAD, and prototyping… more
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