- Google (Mountain View, CA)
- Staff ASIC Design Verification Engineer , Platforms and Devices + _link_ Copy link + _email_ Email a friend _corporate_fare_ Google _place_ Mountain View, CA, USA ... release. + Experience strategizing and verifying digital logic at RTL and GLS level using SystemVerilog or C/C++ or...the verification of Googles SOC offerings. You collaborate with hardware architects and design engineers for functional,… more
- Microsoft Corporation (Mountain View, CA)
- …manage and optimize the Cloud infrastructure. We are looking for a **Senior Design Verification Engineer ** to join the team. **Responsibilities** + Perform ... Microsoft Silicon, Cloud Hardware , and Infrastructure Engineering (SCHIE) is the team...suites, and closing coverage. + Interact with architects and design engineers to create testplans covering verification strategy, test… more
- Amazon (Cupertino, CA)
- …hire for in the United States. In Annapurna Labs we are at the forefront of hardware co- design not just in Amazon Web Services (AWS) but across the industry. The ... while also being deeply important to our customers. We design and build every component of our hardware...* Write Tcl or PERL scripts to improve physical design flows and methods * Collaborate with RTL… more
- NVIDIA (Santa Clara, CA)
- NVIDIA is looking for an ASIC Design Engineer to join our Memory Subsystem Team! As an ASIC Design engineer at NVIDIA, you'll join a group of ... the opportunity to be responsible for the micro-architecture and design including RTL design , synthesis,...BS (or equivalent experience) in Electrical Engineering or Computer Engineer or related degree required, advanced degrees (MS, PhD)… more
- NVIDIA (Santa Clara, CA)
- NVIDIA is looking for an ASIC Design Engineer to join our Memory Subsystem Team! As an ASIC Design engineer at NVIDIA, you'll join a group of ... the opportunity to be responsible for the micro-architecture and design including RTL design , synthesis,...to see: + BS in Electrical Engineering or Computer Engineer or related degree required (or equivalent experience), advanced… more
- Silvus Technologies (Irvine, CA)
- …a fulfilling career._ THE OPPORTUNITY Silvus is seeking a full-time **_Senior FPGA Design Engineer_** reporting to the _Director of FPGA Engineering_ on the _FPGA ... the research and development process from concept to field deployment. FPGA Design Engineers are responsible for the efficient implementation of novel signal… more
- Amazon (Cupertino, CA)
- …learning and AI services for our customers' businesses. We are seeking experienced Physical Design Engineer to build the next generation of our cloud server ... Machine Learning Acceleration team you'll be responsible for the design and optimization of Hardware in our...project tracking and visualizing QoR/stats - Interface directly with RTL , Physical Design , Package Design ,… more
- Amazon (Cupertino, CA)
- …member of the Cloud-Scale Machine Learning Acceleration team you'll be responsible for the design and optimization of hardware in our data centers including AWS ... of emergent technologies. We're looking for an ASIC Physical Design Methodology Engineer to help us trail-blaze...infrastructure to improve compute and storage utilization for physical design work. Interface directly with RTL , Physical… more
- NVIDIA (Santa Clara, CA)
- …specifications, calibration and adaptation algorithms, which then will be translated into RTL and firmware designs. For backend design , you will define, ... USB. + Understanding of on-chip microcontrollers and standard peripherals, with exposure to hardware and firmware co- design . #LI-Hybrid Your base salary will be… more
- Amazon (Cupertino, CA)
- …a member of the Silicon Optimization Engineering Team you'll be responsible for the design and optimization of hardware in our data centers. You'll provide ... possible today. Key job responsibilities * Develop, implement and verify state-of-the-art Design for Test (DFT) architectures * Work with block designers to… more