• Digital Design Engineer

    BrainChip, Inc. (Laguna Hills, CA)
    BrainChip is seeking a Digital Design Engineer to join a team working on cutting-edge and novel AI hardware. The primary job function is to work with team ... be part of our Hardware Development group. The Digital Design Engineer needs to be able to...tools to check the functionalities of the designs in RTL and gate level. Collaborate with other… more
    BrainChip, Inc. (06/12/25)
    - Related Jobs
  • Senior GPU Validation and Emulation…

    Qualcomm (San Diego, CA)
    …vendors and push the methodology to improve the area/performance of the synthesized FPGA RTL . + Work on third-party IP integration and system-level debugging. ... smarter, connected future for all. As a Qualcomm GPU Engineer , you may architect, design , implement, verify,...+ System level RTL simulation & design verification. + Support… more
    Qualcomm (06/04/25)
    - Related Jobs
  • Sr. SoC Validation Engineer , Amazon…

    Amazon (Sunnyvale, CA)
    …The SoC Validation engineer participates in all phases of the SoC design validation. Central to validation workstream is the FPGA development life cycle, ... the SoC. Key job responsibilities Pre-silicon activities: Receive SoC RTL from design team and map it...BSEE or BSCS - 7+ years mapping complex SOC design into multi- FPGA prototyping platforms., eg Veloce,… more
    Amazon (06/24/25)
    - Related Jobs
  • Sr Logic Design Engineer

    Teledyne (Milpitas, CA)
    …impact and want the excitement of being on a team that wins. **Job Description** Design and test FPGA circuitry for next generation Test and Measurement Tools ... factory automation, air and water quality environmental monitoring, electronics design and development, oceanographic research, deepwater oil and gas...any failures found in the field + Fix the RTL , recompile the FPGA and review the… more
    Teledyne (05/30/25)
    - Related Jobs
  • Senior Silicon Digital Design

    Google (Mountain View, CA)
    …Cores, Buses/Fabric/NoC, Debug/Trace, Interrupts, or Clocks/Reset. + Knowledge of Field Programmable Gate Array ( FPGA ) and emulation platforms. + Knowledge ... equivalent practical experience. + 5 years of experience with digital logic design principles, RTL design concepts, and languages such as Verilog or… more
    Google (05/23/25)
    - Related Jobs
  • ASIC Engineer , IP Design , Silicon

    Google (Mountain View, CA)
    …related field, or equivalent practical experience. + 8 years of experience with RTL design using Verilog/System Verilog and microarchitecture. + Experience with ... architecture. + 10 years of industry experience with IP design . + Experience with methodologies for low power estimation,...estimation, timing closure, synthesis. + Experience with methodologies for RTL quality checks (eg, Lint, CDC, RDC). Be part… more
    Google (06/14/25)
    - Related Jobs
  • Technical Leader ASIC Design - Prototyping

    Cisco (San Jose, CA)
    …ASIC or a related discipline + A comprehensive understanding of FPGA design , with proven expertise in partitioning multi-million gate designs across multiple ... focus on FPGA Prototyping + Map multi-million gate SoC designs onto prototyping platforms, creating design...our prototyping methodology + Option to engage in block-level RTL design or block or top-level IP… more
    Cisco (06/25/25)
    - Related Jobs
  • Senior Design Verification Engineer

    Amazon (Sunnyvale, CA)
    …that is powering the latest generation of Echo devices is looking for a Senior Design Verification Engineer to continue to innovate on behalf of our customers. ... and the full chip. You will participate in the design verification and bring-up of the chip and subsystems...in the lab bring-up of these blocks either in FPGA , emulation, or silicon by potentially writing test scripts,… more
    Amazon (06/24/25)
    - Related Jobs
  • Senior Design Verification Engineer

    Amazon (Sunnyvale, CA)
    Description As a Senior Design Verification (DV) Engineer , you will be part of an advanced architecture team that is exploring new hardware designs to improve ... for advanced functional blocks. You will participate in the design verification and bring-up of such blocks by writing...the lab bring-up of these blocks either in an FPGA or silicon by potentially writing test scripts, analyzing… more
    Amazon (06/13/25)
    - Related Jobs
  • Principal or Senior Principal Digital Verification…

    Northrop Grumman (San Diego, CA)
    …tools; 3 years with an MS degree; 0 years with PhD. + Experience in RTL design and verification methodologies for wireless systems + FPGA development ... tools; 7 years with an MS degree; 4 years with PhD. + Experience in RTL design and verification methodologies for wireless systems + FPGA development… more
    Northrop Grumman (04/18/25)
    - Related Jobs