• Hardware Engineer , Wafer Process

    Google (Goleta, CA)
    …degree or equivalent practical experience. + Experience developing and sustaining semiconductor fabrication processes in a cleanroom environment. + Experience in one ... in a related technical field. + 6 years of experience working in semiconductor device RandD or production environments. + Experience in MEMS device fabrication, 3D… more
    Google (04/30/25)
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  • CXR Senior Process and Integration

    Stanford University (Stanford, CA)
    CXR Senior Process and Integration Engineer **School of Engineering, Stanford, California, United States** Research Post Date Mar 10, 2025 Requisition # ... Experience in some device fabrication areas - device design, processing technologies, process integration and device fabrication, assembly and test. + Experience… more
    Stanford University (03/11/25)
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  • Yield and Integration Engineer

    Teledyne (Goleta, CA)
    …+ BS in engineering or a science, MS preferred + 2+ years as a Process , Design, Quality or Manufacturing Engineer + Ability to work in cleanroom environment. ... Yield and Data Engineering Manager, collects, tracks and analyzes process and metrology data from a variety of sources...role, ideal candidate will have some experience in: + Semiconductor wafer processing + Programming skills in: Python, Matlab,… more
    Teledyne (05/16/25)
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  • University Graduate - Process

    Applied Materials (Santa Clara, CA)
    …Careers website to learn more about careers at Applied. **What You'll Do** As a Process Engineer , you'll play a critical role in solving our customers' biggest ... deposition(CVD, PVD, ALD), lithography, and an overall comprehensive understanding of overall process integration and engineering challenges + Ability to work… more
    Applied Materials (05/23/25)
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  • Staff R&D Engineer Adv Tech Dev

    Broadcom (San Jose, CA)
    …Description:** The ideal candidate will have expertise in integrated-circuit process technologies, and semiconductor assembly including manufacturability and ... packaging process technologies + Working knowledge of the Advanced Semiconductor Technology nodes including FinFET and Gate All Around technology; Design… more
    Broadcom (04/11/25)
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  • Process Engineer III - Office of…

    Applied Materials (Santa Clara, CA)
    …our Careers website to learn more about careers at Applied. **Summary** The Process Engineer will be responsible for developing, optimizing, and maintaining ... build and service cutting-edge equipment that helps our customers manufacture display and semiconductor chips - the brains of devices we use every day. As the… more
    Applied Materials (05/15/25)
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  • Foundry Engineer for Advanced Technology,…

    Qualcomm (San Diego, CA)
    …and reliability requirements; you will then drive foundry partners to deliver process integration scheme, design rules best optimized for Power/Performance/Area, ... > ASICS Engineering **General Summary:** As a foundry technology engineer , you will be working in an exciting fast...in CMOS technology development especially in Finfet and beyond semiconductor process nodes + Proficient in breadth… more
    Qualcomm (04/19/25)
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  • Process Integration Technologist,…

    Western Digital (San Jose, CA)
    …with cleanroom process tools is preferred + Experience in device integration (CAD/mask layout/designing process flows/running process lots) **Additional ... qubits, superconducting electronics, etc. + We are looking for a scientist/ engineer with a strong background in nanoscale device processing. Candidates with… more
    Western Digital (03/25/25)
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  • Optical Packaging Engineer

    Texas Instruments (Santa Clara, CA)
    …Lead integrity and yield analysis and drive improvement/corrective actions for silicon process and semiconductor assembly packages utilizing appropriate tools. + ... **Optical Packaging Engineer ** **Location: Dallas, TX or Santa Clara, CA**...related field. + 5+ years of relevant experience in semiconductor package/ process development, including modeling, test development,… more
    Texas Instruments (04/11/25)
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  • Optical Packaging Engineer

    Texas Instruments (Santa Clara, CA)
    …integrity and yield analysis and drive improvement/corrective actions for silicon process and semiconductor assembly packages utilizing appropriate tools.** + ... **Optical Packaging Engineer ** **Location: Dallas, TX or Santa Clara, CA**...related field.** + **5+ years of relevant experience in semiconductor package/ process development, including modeling, test development,… more
    Texas Instruments (03/04/25)
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