• Senior FPGA Design Engineer

    Tarana Wireless (Milpitas, CA)
    …of the brightest minds in the industry. If you're passionate about digital design , solving complex problems, and building products that make a global difference, ... you've been waiting for. As part of our FPGA Design Team, you'll contribute to the development and testing...advanced FPGAs powering our next-gen wireless base stations and ASIC emulation platforms. You'll play a vital role in… more
    Tarana Wireless (05/23/25)
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  • Senior Timing Methodology Engineer

    NVIDIA (Santa Clara, CA)
    …equivalent experience) in Electrical or Computer Engineering with 3 years' experience in ASIC Design and Timing. + Good understanding of modeling circuits for ... work, to amplify human inventiveness and intelligence. We are seeking an innovative Senior Timing Methodology Engineer to help drive sign-off strategies for the… more
    NVIDIA (07/19/25)
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  • Senior Power Architecture and Optimization…

    NVIDIA (Santa Clara, CA)
    …of this team, you will collaborate with Architects, Performance Engineers, Software Engineers, ASIC Design Engineers, and Physical Design teams to study ... We are now looking for a Senior Power Architecture and Optimization Engineer !...power design . + Familiarity with Verilog and ASIC design principles, including knowledge of Power… more
    NVIDIA (06/17/25)
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  • Senior Emulation Power Engineer

    NVIDIA (Santa Clara, CA)
    …Power Team, you will collaborate with Architects, Performance Engineers, Software Engineers, ASIC Design Engineers, Product teams and Physical Design ... We are looking for a Senior Emulation Power Engineer ! NVIDIA prides...power design . + Familiarity with Verilog and ASIC design principles, including knowledge of Power… more
    NVIDIA (05/29/25)
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  • Senior Custom SOC IP Verification…

    NVIDIA (Santa Clara, CA)
    …cycles, this is your place to be. What you'll be doing: + Responsible for ASIC design verification for various processing blocks in a SOC. Work in key ... NVIDIA is seeking a Senior Custom SOC IP Verification Engineer ...in ASIC Development + Experience owning processing ASIC , IP or SoC design verification +… more
    NVIDIA (06/27/25)
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  • Senior Staff Software Engineer

    Qualcomm (San Diego, CA)
    …continues to develop innovative features, enhancements, and use-cases. As a software engineer at Qualcomm, you will help develop SMMU, hypervisor and related ... -- Responsibilities We are looking for a highly motivated engineer and team player who is passionate to learn...Your responsibilities may include, but not limited to, + Design , development and integration of SoC firmware features, diagnostics… more
    Qualcomm (07/15/25)
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  • Senior Synthesis Flow CAD Engineer

    NVIDIA (Santa Clara, CA)
    …with 3+ years of CAD experience; MS preferred + Be familiar with Verilog and ASIC design along with experience in commercial EDA tools + Software engineering ... implementation and analysis tools + Provide support for ASIC tools and flows + Assist chip design teams with advanced implementation tasks What we need to… more
    NVIDIA (06/10/25)
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  • Senior Package Layout Engineer

    NVIDIA (Santa Clara, CA)
    …in a wide range of sectors. To this purpose, we are now seeking a hard-working Senior Package Layout Engineer who is committed to making a difference in the ... position will collaborate with Technical Package Lead and different design teams in the design and development...Layout team, you will collaborate to implement high speed/density ASIC packages. + Perform substrate breakout patterns for … more
    NVIDIA (07/10/25)
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  • Sr. Design Verification Engineer

    SpaceX (Sunnyvale, CA)
    …work extended hours and weekends as needed COMPENSATION & BENEFITS: Pay range: Design Verification Engineer / Senior : $170,000.00 - $230,000.00/per year Your ... Sr. Design Verification Engineer (Silicon Engineering) Sunnyvale,...will work alongside world-class cross-disciplinary teams (systems, firmware, architecture, design , validation, product engineering, ASIC implementation). In… more
    SpaceX (05/23/25)
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  • Sr. Physical Design Methodology…

    Amazon (Cupertino, CA)
    …handling massive scale and rapid integration of emergent technologies. We're looking for an ASIC Physical Design Methodology Engineer to help us trail-blaze ... Proficient in programming/scripting languages (Perl, Python, C++) - Solid understanding of ASIC physical design , and methodologies including synthesis, place and… more
    Amazon (07/26/25)
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