- Silvus Technologies (Irvine, CA)
- …engineers. + RTL coding, simulation, and test bench development. + FPGA synthesis and timing closure. + Hardware verification and troubleshooting; familiarity with ... (MSEE). + Basic MATLAB skill. + Experience with communication systems on FPGA or ASIC designs. **COMPENSATION** _The pay range is NOT a guarantee. It is based on… more
- Silvus Technologies (Los Angeles, CA)
- …career._ THE OPPORTUNITY Silvus is seeking a **_Senior FPGA / RTL Design Engineer - Signal Processing_** who will report to the _Director of FPGA Engineering_ ... engineers. + RTL coding, simulation, and test bench development. + FPGA synthesis and timing closure. + Hardware verification and troubleshooting; familiarity with… more
- NVIDIA (Santa Clara, CA)
- …looking for a Senior Design for Debug (DFD) Architect and Methodology Engineer ! NVIDIA is seeking a DFD Architect to implement hardware and software solutions to ... of ASIC design flow including RTL design, verification, logic synthesis , timing analysis and bringup. + Strong interpersonal skills and an excellent… more
- Amazon (Cupertino, CA)
- …massive scale and rapid integration of emergent technologies. We're looking for an ASIC Physical Design Methodology Engineer to help us trail-blaze new ... Proficient in programming/scripting languages (Perl, Python, C++) - Solid understanding of ASIC physical design, and methodologies including synthesis , place and… more
- quadric.io, Inc (Burlingame, CA)
- …to get in on the ground floor of a revolutionary new processor architecture. As a senior member of our chip design team, you will contribute to all stages of the ... Computer Engineering with a minimum of five years of CPU/GPU/ ASIC front-end design + Proficiency in SystemC, SystemVerilog, or...FPGA design is a plus + Experience in logic synthesis and performance modeling Nice to haves: + Familiarity… more
- Broadcom (San Jose, CA)
- …Account, please Sign-In before you apply.** **Job Description:** **Broadcom is looking for a senior STA engineer . In this role, you will be contributing to ... in using synthesis tools (DC-T, Genus) + Strong understanding of ASIC design flows, including RTL and place-and-route. + Excellent problem-solving skills and… more
- NVIDIA (Santa Clara, CA)
- …work experience + Strong coding skills in C+ + + Good understanding of ASIC Design and understanding of Verilog RTL + Strong interpersonal and collaboration skills. ... from the crowd: + Prior experience in RTL design (Verilog), verification and synthesis . + Proficiency in C++, Perl, Python, Make scripting. + Knowledge of… more
- Silvus Technologies (Irvine, CA)
- …career._ THE OPPORTUNITY Silvus is seeking a full-time Principal FPGA / RTL Design Engineer who will report to the Senior Engineering Director for Irvine and ... addressing challenging real-world communication needs. The Principal FPGA / RTL Design Engineer position will be based at Silvus' Irvine CA engineering facility… more
- Silvus Technologies (Irvine, CA)
- …career._ THE OPPORTUNITY Silvus is seeking a **_Principal FPGA / RTL Design Engineer - Signal Processing_** who will report to the _Senior Engineering Director_ in ... blocks. + RTL coding, simulation, and test bench development. + FPGA synthesis and timing closure. + Hardware verification and troubleshooting; familiarity with… more
- Broadcom (San Jose, CA)
- …Account, please Sign-In before you apply.** **Job Description:** **Broadcom is looking for a senior level ASIC physical design engineer . In this highly ... + **Deep knowledge about industry standards in Physical Design, Physical aware synthesis , Floorplanning, CTS and place and route.** + **Experience in developing and… more