• Senior Silicon Engineer

    Microsoft Corporation (Santa Clara, CA)
    …Unit (DPU) team within the Azure Hardware Systems & Infrastructure group is seeking a Senior Silicon Engineer . You will join our front-end silicon team and be ... low power, scalable and programmable DPU silicon. As a Senior Silicon Engineer in the Data Processing...micro-architecture specification and RTL development of design modules for ASIC memory subsystem. + Review and provide feedback on… more
    Microsoft Corporation (08/08/25)
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  • Senior DFx/RTL Engineer

    Cisco (San Jose, CA)
    Senior DFx/RTL Engineer Apply (https://jobs.cisco.com/jobs/Login?projectId=1447271) + Location:San Jose, California, US + Area of InterestEngineer - Hardware + ... be in the Silicon One development organization as an ASIC Implementation Technical Lead in San Jose, CA with...coordinated in the RTL. + Work closely with the design/design- verification and PD teams to enable the integration and… more
    Cisco (07/22/25)
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  • Senior PCIe Post-Silicon Validation…

    NVIDIA (Santa Clara, CA)
    We are now looking for a Senior Post-Silicon Validation Engineer to join our team! NVIDIA has continuously reinvented itself over the past two decades. Our ... and implementation, define the validation scope, develop the post-silicon verification infrastructure (Testplans, Tests, Scripts to analyze data), implement… more
    NVIDIA (07/09/25)
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  • Senior FPGA Design Engineer

    Silvus Technologies (Los Angeles, CA)
    …test bench development. + FPGA synthesis and timing closure. + Hardware verification and troubleshooting; familiarity with logic analyzers. + Provide support to the ... (MSEE). + Basic MATLAB skill. + Experience with communication systems on FPGA or ASIC designs. **COMPENSATION** _The pay range is NOT a guarantee. It is based on… more
    Silvus Technologies (06/13/25)
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  • Senior Design for Debug Architect…

    NVIDIA (Santa Clara, CA)
    …looking for a Senior Design for Debug (DFD) Architect and Methodology Engineer ! NVIDIA is seeking a DFD Architect to implement hardware and software solutions to ... and/or other silicon visibility tools. + Great understanding of ASIC design flow including RTL design, verification ,...of ASIC design flow including RTL design, verification , logic synthesis, timing analysis and bringup. + Strong… more
    NVIDIA (06/11/25)
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  • Senior FPGA Prototyping Engineer

    NVIDIA (Santa Clara, CA)
    …GPUs and SOCs on standard FPGA prototyping platforms. We are now looking for a Senior FPGA Prototyping Engineer to join our Emulation team onsite in Santa Clara, ... Protocompiler or Synplify Premier and Xilinx Vivado + Exposure to ASIC design and verification tools (VCS or equivalent, Verdi, GDB). + Knowledge of Verilog,… more
    NVIDIA (06/10/25)
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  • Senior Mask Design Engineer

    NVIDIA (Santa Clara, CA)
    …We would love to hear from you! Are you looking for a Mask layout Design Engineer role? We are looking for a Senior Mask Layout Design Engineer ! ... CMOS technologies using Cadence tools. + You'll work cross functionally with ASIC and mixed-signal engineers to customize designs for integration in VLSI products.… more
    NVIDIA (07/24/25)
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  • Systems Engineer (Lead, Senior )

    The Boeing Company (El Segundo, CA)
    …subsystem testbeds. + Support unit-level integration and performance simulations. + Support ASIC and FPGA level system design and verification . + Support ... your future with us. Boeing Defense, Space & Security is seeking **Systems Engineers ( Senior , Lead)** to join the Space and Launch Engineering team in **El Segundo,… more
    The Boeing Company (08/02/25)
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  • Senior Mask Design Engineer

    NVIDIA (Santa Clara, CA)
    …creativity and intelligence. We would love to hear from you! We are looking for a Senior Mask Layout Design Engineer , someone who is excited to join a growing ... CMOS technologies using Cadence tools. + You'll work cross functionally with ASIC and mixed-signal engineers to customize designs for integration in VLSI products.… more
    NVIDIA (07/17/25)
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  • Senior Timing and Constraints Methodology…

    NVIDIA (Santa Clara, CA)
    …to amplify human inventiveness and intelligence. We are seeking an innovative senior timing signoff and constraint methodology engineer to develop pioneering ... across hierarchical boundaries). + Collaborate with RTL, physical design, and verification teams to drive consistency and correctness across design stages. What… more
    NVIDIA (05/29/25)
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