• Electrical Engineer (Associate, Mid-Level,…

    The Boeing Company (El Segundo, CA)
    …Analysis * Power Supply * Electronics Packaging * ASIC FPGA Development and Verification * Electrical Design System Engineer * RF Microwave Engineer * ... has exciting opportunities for **Electrical Engineers (Associate, Mid-Level, or Senior )** to join us as part of our teams...for Mid-Level: $104,550 - $141,450 Summary pay range for Senior : $126,650 - $171,350 Applications for this position will… more
    The Boeing Company (11/08/25)
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  • Senior Applications Engineer - DDR…

    Cadence Design Systems, Inc. (San Jose, CA)
    …and innovators who want to make an impact on the world of technology. Senior Applications Engineer - DDR Design IPJob Location: San Jose, CAJob DescriptionThe ... DDR4/5, LPDDR4/5/5X, HBM2/3, GDDR6* Perl/Python Scripts* Experience on memory subsystem verification and/or performance analysis* Strong knowledge of ASIC flow,… more
    Cadence Design Systems, Inc. (10/11/25)
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  • Senior FPGA / Rtl Design Engineer

    Silvus Technologies (Los Angeles, CA)
    …career._ THE OPPORTUNITY Silvus is seeking a **_Senior FPGA / RTL Design Engineer - Signal Processing_** who will report to the _Director of FPGA Engineering_ ... test bench development. + FPGA synthesis and timing closure. + Hardware verification and troubleshooting; familiarity with logic analyzers. + Provide support to the… more
    Silvus Technologies (10/08/25)
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  • Senior Hardware Diagnostics Engineer

    Microsoft Corporation (Santa Clara, CA)
    …all the components of the DPU based systems. We are looking for a ** Senior Hardware Diagnostics Engineer ** to join our team! **Responsibilities** + Develop test ... software and hardware expertise to create a highly programmable and high-performance ASIC with the capability to efficiently handle large data streams. Thanks to… more
    Microsoft Corporation (11/21/25)
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  • Senior Mask Design Engineer

    NVIDIA (Santa Clara, CA)
    Engineer ? If yes, We would love to hear from you! We are looking for a Senior Mask Layout Design Engineer , someone who is excited to join a growing and ... CMOS technologies using Cadence tools. + You'll work cross functionally with ASIC and mixed-signal engineers to customize designs for integration in VLSI products.… more
    NVIDIA (11/13/25)
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  • Senior Mask Design Engineer

    NVIDIA (Santa Clara, CA)
    Engineer ? If yes, We would love to hear from you! We are looking for a Senior Mask Layout Design Engineer , someone who is excited to join a growing and ... sub-micron CMOS technologies using Cadence tools. + You'll work multi-functional with ASIC and mixed-signal engineers to customize designs for integration in VLSI… more
    NVIDIA (08/28/25)
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  • Senior Component Engineer

    Palo Alto Networks (Santa Clara, CA)
    …great outcomes. **Your Career** We are seeking an experienced and highly motivated Senior Component Engineer to join our exciting, fast growing company and ... component manufacturers to root cause and corrective action implementation and verification . Be the technical point person for component quality/performance issues.… more
    Palo Alto Networks (10/16/25)
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  • Senior Design for Debug Architect…

    NVIDIA (Santa Clara, CA)
    …looking for a Senior Design for Debug (DFD) Architect and Methodology Engineer ! NVIDIA is seeking a DFD Architect to implement hardware and software solutions to ... and/or other silicon visibility tools. + Great understanding of ASIC design flow including RTL design, verification ,...of ASIC design flow including RTL design, verification , logic synthesis, timing analysis and bringup. + Strong… more
    NVIDIA (09/10/25)
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  • Senior Power Engineer , ML…

    Google (Sunnyvale, CA)
    Senior Power Engineer , ML Accelerators _corporate_fare_ Google _place_ Sunnyvale, CA, USA **Mid** Experience driving progress, solving problems, and mentoring ... + 5 years of experience in logic design, digital ASIC , or SoC design. + Experience with RTL (Register...loved by millions worldwide, and leverage your design and verification expertise to verify complex digital designs, with a… more
    Google (11/22/25)
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  • Senior Methodology Engineer , CAD…

    NVIDIA (Santa Clara, CA)
    …you can make a lasting impact on the world! We are currently looking for a Senior Methodology Engineer to develop and support our CAD tooling in our Circuit ... EDA tool and design collaterals to streamline design and verification workflows + Work closely with design engineers to...out from the crowd: + Previous work in VLSI, ASIC , or EDA is a definite plus + Experience… more
    NVIDIA (10/21/25)
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