• Sr. SOC/ASIC Physical Design

    SpaceX (Sunnyvale, CA)
    …extended hours and weekends as needed COMPENSATION AND BENEFITS: Pay range: Physical Design Engineer / Senior : $170,000.00 - $230,000.00/per year Your actual ... Sr. SOC/ASIC Physical Design Engineer (Silicon Engineering) Sunnyvale, CA... team to drive architectural feasibility studies, develop timing, power and area design targets, and explore… more
    SpaceX (01/07/26)
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  • Sr. Full Chip Physical Design

    SpaceX (Sunnyvale, CA)
    …extended hours and weekends as needed COMPENSATION AND BENEFITS: Pay range: Physical Design Engineer / Senior : $170,000.00 - $230,000.00/per year Your actual ... Sr. Full Chip Physical Design Engineer (Silicon Engineering) Sunnyvale, CA...of deep sub-micron FinFET technology nodes (7nm and below) design problems and solutions (leakage power , signal… more
    SpaceX (01/07/26)
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  • Senior Timing Methodology Engineer

    NVIDIA (Santa Clara, CA)
    …of mathematics/physics fundamentals of electrical design . + Clear understanding of low power design techniques such as multi VT, Clock gating, Power ... human inventiveness and intelligence. We are seeking an innovative Senior Timing Methodology Engineer to help drive...drop etc. + Collaborate with technology leads, VLSI physical design , and timing engineers to define and deploy the… more
    NVIDIA (11/20/25)
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  • Senior Control Systems Engineer

    SLAC National Accelerator Laboratory (Menlo Park, CA)
    …**As a member of the ECS Engineering and Design department, the Senior Control System Engineer will join a multidisciplinary engineering group which develops ... Senior Control Systems Engineer Job ID 6549...(LCLS) Directorate at SLAC is seeking a Control System Engineer to join the Engineering and Design controls… more
    SLAC National Accelerator Laboratory (11/05/25)
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  • Senior Transmission & Distribution…

    AECOM (Oakland, CA)
    …Join us. **Job Description** **AECOM** has a position available for a ** Senior Civil/Structural Engineer ** with experience focused on **Substation and ... include but not limited to: + Serves as lead engineer and Engineering of Record on small to mid-...small to mid- size projects + Prepare overhead line design using PLS-CADD + Transmission line structural design more
    AECOM (10/23/25)
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  • Senior Building Engineer

    CBRE (Sunnyvale, CA)
    Senior Building Engineer Job ID 251495 Posted 10-Dec-2025 Service line Advisory Segment Role type Full-time Areas of Interest Engineering/Maintenance Location(s) ... including a candidate's education, training, and experience. The minimum salary for the Senior Building Engineer position is $60.19 hourly and the maximum salary… more
    CBRE (12/16/25)
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  • Senior Building Engineer

    CBRE (Fremont, CA)
    Senior Building Engineer Job ID 228701 Posted 10-Sep-2025 Service line GWS Segment Role type Full-time Areas of Interest Building Management, ... including a candidate's education, training, and experience. The minimum salary for the Senior Building Engineer position is $85,000 annually and the maximum… more
    CBRE (11/25/25)
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  • Junior Substation P&C Design

    WSP USA (San Diego, CA)
    **This Opportunity** WSP is currently initiating a search for a **Junior Substation P&C Design Engineer ** for our **San Diego, CA** office. Be involved in ... projects with our ** Power Delivery Substation Team** and be a part of...be required depending on project-specific requirements. **Preferred Qualifications:** + Engineer in Training Certification. + Prior design more
    WSP USA (12/16/25)
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  • Senior Show Electronic Engineer

    The Walt Disney Company (Glendale, CA)
    **Show Electronic Engineer Senior - Project Hire/Internal Assignment** **About the Role & Team:** Walt Disney Imagineering is the creative force that imagines, ... fulfilling and inspiring for all of us. As the Senior Show Electronic Engineer - Project Hire/Internal...media scope and evaluation of creative intent, facility acoustic design and evaluation, delivery and source equipment criteria and… more
    The Walt Disney Company (12/03/25)
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  • Senior Memory System Engineer

    NVIDIA (Santa Clara, CA)
    NVIDIA is now looking for a Senior Memory System Engineer to join our ASIC Memory Subsystem team! As a Senior Systems Engineer at NVIDIA, you'll join a ... Platform / System architect, Firmware, SI/PI, Memory suppliers to design and architect cutting edge, high speed and lower... and architect cutting edge, high speed and lower power memory technology for NVIDIA CPUs and SOCs. What… more
    NVIDIA (01/01/26)
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