- Stantec (Los Angeles, CA)
- …is on a mission to become the world's leading integrated design practice. Our architects, engineers, interior designers, sustainability specialists, and ... technologists are passionate about the power of design . We take an innovative, collaborative approach to projects,...member of larger projects under the guidance of a Senior Structural Engineer. The Structural EIT will be able… more
- Intuit (San Diego, CA)
- …practical, scalable solutions that integrate seamlessly into existing products and design systems . **Responsibilities** **Responsibilities** + Lead design ... multimodal patterns (eg, LLMs, conversational interfaces) + Expert in Figma and design systems , including tokens, performance optimization, and analytics +… more
- TYLin (Oakland, CA)
- …and complexity. Together, we enhance conventional designs with smarter, more resilient systems . We provide people with better mobility. We steward precious resources ... about Roads and Highways? Our expertise in the planning, design , and construction management of roads and highways is...drawings, calculations, and cost estimates under close supervision of senior engineers + Ability to apply the use of… more
- Northrop Grumman (Manhattan Beach, CA)
- …only part of history, they're making history. **Position Description** The **Principal/ Senior Principal MMIC Design Engineer** position supports Northrop ... experience + Keysight ADS or Cadence AWR experience + US citizenship is required ** Senior Principal Engineer MMIC Design Engineer (Level 4)** + Bachelor of… more
- Cadence Design Systems, Inc. (San Jose, CA)
- …world of technology. Are you looking to re-enter the workforce as a Physical Design Application Engineer after taking a career break for caregiving? Who is eligible ... Please ONLY consider applying if you are a Physical Designer and (IMPORTANT) who has been out of the...and have a minimum of three years of Physical Design work experience. This role is not open to… more
- DoorDash (San Francisco, CA)
- …hundreds of DoorDash engineers! We're looking for a Software Engineer to join our design systems team to help develop the tools, processes, and component ... You are an engineer that values and practices good design , or has been a designer in...in Android engineering. (Bonus points for previous experience with design systems and/or Swift package library management).… more
- BAE Systems (San Diego, CA)
- …growing your skills, and advancing your career. BAE is looking for experienced senior level FPGA Design Verification Engineers who can plan, architect, and ... **Job Description** Picture yourself developing advanced electronic systems deployed to protect members of our armed...be available based on position level and/or job specifics. ** Senior Principal Design Verification Engineer - FPGA… more
- Cadence Design Systems, Inc. (San Jose, CA)
- …to make an impact on the world of technology. We are looking for a Senior Technical Program Manager to oversee the coordination of R&D Development Projects and Key ... Customer Engagements within the Design IP Group. The candidate must have strong, hands-on...have strong, hands-on experience in digital and/or mixed-signal IP design and/or SoC development, with a proven track record… more
- Cadence Design Systems, Inc. (San Jose, CA)
- …and innovators who want to make an impact on the world of technology. Senior Applications Engineer - DDR Design IPJob Location: San Jose, CAJob DescriptionThe ... power the world's Data Centers, Automobiles, Cloud and Wireless Systems . We offer amazing opportunities to grow in your...simulations, synthesis and publications. As you grow into more senior roles, you will use your knowledge of different… more
- Cadence Design Systems, Inc. (San Jose, CA)
- …make an impact on the world of technology. We are looking for SoC/ASIC Digital Design Engineer with experience in Design for Test (DFT). An intimate knowledge ... + Prior 5-15 years of professional experience in SoC/ASIC Digital Design with focus on Design for Test (DFT) + Should possess intimate knowledge of DFT… more