• Principal / Senior Principal FPGA

    Northrop Grumman (Annapolis Junction, MD)
    …with PhD) - Experience in HDL (VHDL/Verilog) and HVL (SystemVerilog) + Experience with FPGA or ASIC + Knowledge of Universal Verification Methodology (UVM) + ... **a Top Secret/SCI security clearance with Polygraph** **.** **Basic Qualifications Senior Principal Digital Verification Engineer :** + Bachelor's degree in… more
    Northrop Grumman (08/08/25)
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  • Staff Lead Design Verification Engineer

    Northrop Grumman (Annapolis Junction, MD)
    …culture of design. We are seeking an exceptional Senior Functional Verification Engineer specializing in ASIC and FPGA technologies. The ideal candidate ... design specification requirements **Functional Verification:** + Conduct in-depth behavioral simulations across ASIC and FPGA + Generate and execute advanced UVM… more
    Northrop Grumman (07/18/25)
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  • Principal Digital Verification Engineer

    Northrop Grumman (Linthicum Heights, MD)
    …are looking for you to join our team as a Principal Digital Verification Engineer / Senior Principal Digital Verification Engineer based out of Linthicum, MD ... This requisition may be filled as a Principal Digital Engineer or a Senior Principal Digital ...Mission Systems that encompasses Digital Verification Engineering to support ASIC and FPGA product development. + Work… more
    Northrop Grumman (05/21/25)
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  • Hardware Design Engineer , Senior

    Parsons Corporation (Fort George G Meade, MD)
    …devices such as Application Specific Integrated Circuit ( ASIC ) and Field Programmable Gate Array ( FPGA ) hardware. Analyzes the function of existing ... for. **Job Description:** Parsons is seeking a **Hardware Design Engineer (HDE) Skill Level 3 to support efforts based...efficient, able to be manufactured, and reliable + Apply ASIC or FPGA place and route (P&R)… more
    Parsons Corporation (06/03/25)
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  • Senior Test and Integration Engineer

    Leidos (Linthicum, MD)
    …and testing of new ASIC designs prior to fabrication using Field Programmable Gate Arrays ( FPGA ) to emulate the chips. + (U//FOUO) Write custom interfaces ... is currently looking to add a Test and Integration Engineer to a Cyber Security Program near Ft. Meade,...testing on variants, prototype devices and production versions of ASIC chip designs following production. + Design in-depth security… more
    Leidos (08/08/25)
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  • Senior Digital Verification Engineer

    Huntington Ingalls Industries (Fort Meade, MD)
    …thinkers who can uncover difficult-to-activate corner-case bugs and vulnerabilities in the gate -level netlists of FPGA and ASIC designs. Candidates ... $116,245.00 - $165,000.00 Security Clearance: TS/SCI with Poly Level of Experience: Senior This opportunity resides with Warfare Systems (WS), a business group… more
    Huntington Ingalls Industries (07/10/25)
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