• Senior Timing and Constraints Methodology…

    NVIDIA (Santa Clara, CA)
    …to amplify human inventiveness and intelligence. We are seeking an innovative senior timing signoff and constraint methodology engineer to develop pioneering ... environments that are scalable, reusable, and validated through both structural and formal processes for constraint correctness + Analyze RTL clock constructs to… more
    NVIDIA (05/29/25)
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  • Senior Firmware Security Engineer

    NVIDIA (Santa Clara, CA)
    …and negative testing + Experience developing for safety critical platforms + Experience with formal verification + Passion for your work Your base salary will be ... that powers the world's best GPUs. NVIDIA is searching for an outstanding security software engineer to fill an exciting, yet fun role on our GPU Firmware team. You… more
    NVIDIA (07/28/25)
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  • Senior RTL Analysis Methodology…

    NVIDIA (Santa Clara, CA)
    …a lasting impact on the world. We are looking for a motivated CAD Methodology Engineer to join our dynamic and growing team. If you like solving challenging problems ... in asynchronous digital design and verification in a highly multi-functional work environment then join...Deep understanding of static sign-off technologies CDC, RDC and Formal . + Proficiency in one or more scripting languages… more
    NVIDIA (05/16/25)
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  • Senior ASIC Design Engineer

    Amazon (San Diego, CA)
    …. Familiarity with UVM and Matlab . Ability to write assertions and exposure to Formal verification . Strong written and verbal skills Amazon is an equal ... solutions, and meeting the power objectives . Create standalone verification test bench to verify the correctness of your...the correctness of your block . Work with the verification team and participate in System level verification more
    Amazon (07/09/25)
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  • Senior Software Engineer - C/C++,…

    Siemens (Fremont, CA)
    …stacks like AWS, Azure, Google cloud etc. Exposure to Simulation or Formal -based Verification methodologies. Knowledge of Python, ML based techniques and ... chip, board, and system design.We are seeking a passionate and highly skilled software engineer to join the Questa Visualizer Debug R&D team at Siemens EDA. In this… more
    Siemens (08/08/25)
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  • Senior Physical Design Engineer

    NVIDIA (Santa Clara, CA)
    …+ Debugging timing violations and rolling in functional, Timing ECO's and netlist formal verification . + Physical verification - ERC, DRC, LVS etc. ... What we need to see: + Bachelor's or a Master's degree in Engineering or equivalent experience. + 6+ years of hands-on experience in Physical design. + Place and route tool experience with Synopsys ICC2 or Candence Innovus + Static timing analysis with… more
    NVIDIA (07/24/25)
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  • Senior Mechanical Structure Engineer

    SAIC (San Bernardino, CA)
    …data; and presenting analysis and predictions to a technical audience in formal and informal contexts. This role works in coordination with a multi-disciplinary ... team performing independent validation and verification (IV&V) on rocket launch vehicles to support launch programs on an aggressive schedule. **_This role may… more
    SAIC (08/07/25)
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  • Modeling & Simulation Systems Engineer 3…

    Northrop Grumman (Los Angeles, CA)
    …moon. Northrop Grumman is currently looking for an experienced **Principal or Senior Principal** level engineer in **Modeling and Simulations, Systems ... Must be able to obtain a SAP level clearance. **Basic Qualifications for a Senior Principal Engineer , Modeling and Simulation Software - (Level 04):** + BS… more
    Northrop Grumman (08/08/25)
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  • Aerospace Quality Engineer (Arp4754 / APQP…

    Safran (Irvine, CA)
    …* Advanced English level (Communicates with international customers, operations and senior leadership; formal documentation writing) * Leadership skills ... Aerospace Quality Engineer (ARP4754 / APQP / NPI) Company :...Review of project plans such as System Development and Verification Plan, System Integration Validation and Verification more
    Safran (06/05/25)
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  • Sr. CAD Engineer , ASIC

    Amazon (Sunnyvale, CA)
    …methodology - Develop, regress and deploy digital implementation flows including Synthesis and Formal Verification - Enable digital design teams to meet PPA ... broadband connectivity. Come work at Amazon! The Role: As Senior CAD Engineer you will be responsible...and debugging techniques - Familiar with basic Synthesis and Formal Verification methodology and flow development experience… more
    Amazon (07/10/25)
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