• Senior Principal Scientist, Peptide…

    Genentech (South San Francisco, CA)
    …(eg, OBOC, mRNA display, AS/MS). Computational Methods: + Experience with computational modeling and simulation for peptide design and optimization, including ... Opportunity** We are seeking a highly motivated and experienced Medicinal Chemist ( Senior Principal Scientist) to join our innovative research and development team.… more
    Genentech (11/06/25)
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  • Principal/ Senior Principal Engineer RF…

    Northrop Grumman (Manhattan Beach, CA)
    …part of history, they're making history. **Position Description** The **Principal/ Senior Principal MMIC Design Engineer** position supports Northrop Grumman's ... designs for sampling to customers + Execute verification test analysis and present results to the external customer. +...or Cadence AWR experience + US citizenship is required ** Senior Principal Engineer MMIC Design Engineer (Level 4)** +… more
    Northrop Grumman (12/13/25)
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  • Senior Software Engineer

    J&J Family of Companies (Irvine, CA)
    …searching for the best talent to join our Vision team as a ** Senior Software Engineer** located in **Irvine, California.** Fueled by innovation at the intersection ... on their journey to wellness. Learn more at https://www.jnj.com/medtech **Purpose:** The Senior Software Engineer will make vital contributions to the Johnson &… more
    J&J Family of Companies (12/09/25)
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  • Senior VDC / BIM Specialist

    Tutor Perini (Menlo Park, CA)
    …on experience Rudolph & Sletten, a Tutor Perini Company, is seeking a ** Senior ** **VDC/BIM Specialist** to join our office in Menlo Park, CA. **About Rudolph ... need Exceptional Talent Let's Build_** **General Purpose of the Position:** The Senior VDC/BIM Specialist is essential in ensuring that digital construction models… more
    Tutor Perini (11/19/25)
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  • Senior Manager, Performance Engineering…

    Palo Alto Networks (Santa Clara, CA)
    …**Your Career** We are seeking a highly skilled and motivated Senior Manager, Performance Engineering to lead our global performance engineering organization. ... design and development of performance test frameworks, automation tools, and simulation environments for end-to-end system testing. + Drive benchmarking and… more
    Palo Alto Networks (11/25/25)
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  • Vehicle Management Systems Engineer - Principal…

    Northrop Grumman (Redondo Beach, CA)
    …integration, verification & validation + Extensive experience with engineering modeling and simulation **Preferred Qualifications:** + Experience writing ... system anomalies across multiple engineering disciplines + Perform technical planning, analysis , and hardware trade studies to meet requirements. + Coordinate and… more
    Northrop Grumman (11/21/25)
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  • Senior RF/Antenna Engineer

    OffWorld (Pasadena, CA)
    …least 7 years of professional experience. + Phased array antenna system modeling , design analysis , and concurrent engineering with a fast-paced ... making. We are currently looking for an experienced and technically creative Senior RF test Engineer who contributes to the designs, development, and implementation… more
    OffWorld (10/17/25)
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  • Senior Aviation Terminal Planner/PM

    HNTB (Oakland, CA)
    …complex airports. + Ability to assess analytical demand and spatial requirements leveraging simulation modeling or spreadsheet analysis . + Expertise using ... Aviation Planning + Environmental Practice is recruiting for one or more Senior Aviation Terminal Planners. The position entails leading both analytical and spatial… more
    HNTB (09/17/25)
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  • Senior GPU Memory Architect

    NVIDIA (Santa Clara, CA)
    …across the field of CPU/GPU architecture and depth in the area of PPA analysis is highly desirable. This position offers the opportunity to have a real impact ... feature integration. + Analyze benchmarks, application workloads, and performance/power simulation and emulation results to identify areas for architecture… more
    NVIDIA (12/13/25)
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  • Senior CPU Power Architect

    NVIDIA (Santa Clara, CA)
    …optimize CPU power efficiency across the full design cycle - from early modeling to silicon validation. You will collaborate with architecture, RTL, physical design, ... tests (eg, peak power, di/dt stress patterns) for both simulation and silicon. + Silicon Validation: Measure CPU power...VLSI circuits + Experience with RTL and netlist power analysis tools such as Power Artist, PrimeTime PX, or… more
    NVIDIA (11/20/25)
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