- NVIDIA (Santa Clara, CA)
- We are now looking for a Senior ASIC Design Engineer . NVIDIA is seeking ASIC Design Engineers to implement the world's leading SoC's and GPU's. This ... will implement, document and deliver high performance, area and power efficient RTL to achieve design targets...area and power efficient RTL to achieve design targets and specifications. + Analyze architectural trade-offs based… more
- NVIDIA (Santa Clara, CA)
- …and design the GPU or CPU clocks to satisfy all the architectural/ design /physical constraints. + Improve Power , Performance, and Area (PPA) of innovative ... The clocks group is looking for a top-notch ASIC engineer to join the team. The Team is responsible...design + Understanding of system level artifacts like power , noise, etc + Experience with scalable designs and… more
- Amazon (San Diego, CA)
- …unserved and underserved communities around the world. Come work at Amazon! The Role: As Senior SERDES Design Engineer , you will engage with an experienced ... or related field - 7+ years experience in SERDES design - Experience with high-speed, low- power SERDES IP, especially the PHY layer Preferred Qualifications -… more
- Microsoft Corporation (Mountain View, CA)
- …for passionate engineers to help achieve that mission. We are looking for a ** Senior ** ** Design Engineer ** to work in the dynamic Microsoft Artificial ... and beyond. **Responsibilities** You will be part of the design team driving many facets of high performance, high...+ 4+ years of experience in Synthesis, Timing constraints, Power , Performance, Area (PPA) trade-offs and Post-Silicon Debug +… more
- Microsoft Corporation (Mountain View, CA)
- …solutions that will manage and optimize the Cloud infrastructure. We are looking for a ** Senior Design for Test (DFT) Engineer ** to join the team. ... Manufacturing Engineering (CSME) organization within SCHIE is responsible for design , development, manufacturing and packaging of Microsoft's state-of-the-art computer… more
- NVIDIA (Santa Clara, CA)
- We are now looking for a Logic Design Engineer with Physical Design background! As a member of our CPU Logic Design Team, you will be responsible for the ... and last-level caches , working closely with the physical design team on implementation, synthesis and timing closure as... teams responsible for achieving timing, area, performance and power goals of the unit. + Help define the… more
- NVIDIA (Santa Clara, CA)
- …see how you can make a lasting impact on the world. Join NVIDIA as a Senior SoC Design Engineer developing innovative SoC solutions. What you'll be doing: ... + Work closely with architects, chip leads, and customers on SoC IP design , timing closure, power analysis, methodology alignment, and program execution,… more
- NVIDIA (Santa Clara, CA)
- We are now hiring for a Senior Library Design Engineer ! NVIDIA has continuously reinvented itself over two decades. Our invention of the GPU in 1999 sparked ... Advanced Technologies Group is looking to hire a Library Design Engineer in our group. Do you...process nodes + Hands-on experience with standard cell timing, power , statistical characterization and modeling. Familiar with advanced variation… more
- NVIDIA (Santa Clara, CA)
- …of power intent files such as UPF, and use of FSDB/SAIFs for power optimization + Understanding of hierarchical design , pinning and budgeting flows + ... What you will be doing: + Developing innovative physical design methodologies for implementation of GPU, CPU and SOCs,...Experience with power distribution networks, Design for Yield and Manufacturability, EM and IR closure… more
- NVIDIA (Santa Clara, CA)
- …to amplify human inventiveness and intelligence. We are now looking for a motivated Senior ASIC Physical Design Engineer , Netlisting to join our dynamic ... intelligence. What you'll be doing: + You will drive physical design of high-frequency and low- power CPUs, GPUs, SoCs at block level, cluster level, and/or full… more