- NVIDIA (Santa Clara, CA)
- We are looking for a Senior Mixed-Signal/Analog/IO Circuit Design Engineer - someone who is excited to join a rapidly growing team of creative circuit design ... and Latch-Up requirements + Possess an understanding of system-level timing budgets, specs, and analysis + Working Knowledge of...plus + Hands-on experience of silicon debug with Lab test and measurement equipment is a plus Your base… more
- NVIDIA (Santa Clara, CA)
- We are now looking for a Senior Circuit Design Engineer ! NVIDIA stands at the intersection of hardware excellence and AI breakthrough, where every line of code ... solutions and detailed transistor-level analysis. + Develop prototypes of patentable ideas on test chips and drive them to be deployed across the entire line of… more
- NVIDIA (Santa Clara, CA)
- We are now looking for a Senior Circuit Design Engineer ! NVIDIA has been redefining computer graphics, PC gaming, and accelerated computing for more than 25 ... solutions and detailed transistor-level analysis. + Create prototypes of patentable ideas on test chips and drive them to be deployed across the entire line of… more
- NVIDIA (Santa Clara, CA)
- …Verilog, logic design concepts, and typical structures. + Good understanding of design for test , timing constraints, and static timing analysis. + Experience ... designs. For backend design, you will define, build synthesis constraints and drive timing closure. Evaluating PPA trade-offs based on synthesis and P&R feedbacks is… more
- Amazon (San Diego, CA)
- …in silicon from system specification to chip specification to RTL to optimizing timing / power to chip level validation . Develop solutions optimizing customer ... and meeting the power objectives . Create standalone verification test bench to verify the correctness of your block...and DPI-C . Ensure that the block meets DFT, timing and power targets by working closely with the… more
- Amazon (Cupertino, CA)
- …designers, testing, and transition to manufacturing. Applying skills in simulation, timing analysis, thermal analysis, and EMC is expected. AWS Infrastructure ... - Experience in developing functional specifications, design verification plans and functional test procedures - BSEE with 10+ years experience in hardware board and… more
- NVIDIA (Santa Clara, CA)
- …required. + Experience in Spice simulation and analysis. + Understanding of timing closure, interconnect design, and custom circuits are required. + Understanding of ... power circuits, eg power gating, decaps, multi-vt is required. + Understanding of Design-for- test (DFT) and logic design is a plus. + Proficiency in scripting… more
- Ford Motor Company (Long Beach, CA)
- …between application software and firmware. . Develop multicore, timing -critical software architectures. . Work with/resolve ambiguity in ... framework for a unit. SIL and HIL testing. . Develop comprehensive test plans and perform thorough testing to validate firmware functionality, stability, and… more
- SpaceX (Sunnyvale, CA)
- …hours and weekends as needed COMPENSATION AND BENEFITS: Pay range: Physical Design Engineer / Senior : $170,000.00 - $230,000.00/per year Your actual level and base ... Sr. SOC/ASIC Physical Design Engineer (Silicon Engineering) Sunnyvale, CA Apply SpaceX was...internet to millions of users worldwide. We design, build, test , and operate all parts of the system -… more
- SpaceX (Sunnyvale, CA)
- …path delay fault models, while focusing on pattern compression, diagnosis, and hierarchical test flows. + Run and debug non- timing and SDF annotated gate-level ... internet to millions of users worldwide. We design, build, test , and operate all parts of the system -...as needed COMPENSATION AND BENEFITS: Pay range: Physical Design Engineer / Senior : $170,000.00 - $230,000.00/per year Your actual… more