• Senior Test Technician

    Curtiss-Wright Corporation (Santa Clarita, CA)
    …comprehensive knowledge of wiring diagrams and schematics, and digital bus signal architecture. + Knowledge of application and function of Oscilloscopes, Spectrum ... Analyzers, Signal -Function generators, and the multitude of common electronic measurement...- Aerospace & Industrial, Defense Electronics and Naval & Power , we remain focused on advanced technologies for high… more
    Curtiss-Wright Corporation (07/08/25)
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  • Senior Principal EMI/EMC Electrical Engineer

    Northrop Grumman (Los Angeles, CA)
    …CST CAE tools + Experience with EMP simulation, modeling, and testing. + Experience in Signal Integrity analysis, working knowledge in using Cadence Signal ... team as an EMI/EMC Electrical Engineer based out of Woodland Hills, CA. As Power Electronics Design Engineer at Northrop Grumman, you will have a challenging and… more
    Northrop Grumman (06/28/25)
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  • CPU Server Physical Electrical Analysis Engineer

    Qualcomm (Santa Clara, CA)
    … grid solutions development and implementation. + Knowledge of system-level PDN and power integrity . + Skilled in PnR implementation, verification, power ... at both block and top levels, including static/dynamic IR assessment, power / signal electromigration (EM) analysis, and electrostatic discharge (ESD) evaluations.… more
    Qualcomm (07/23/25)
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  • Account Technical Executive, Custom Analog

    Cadence Design Systems, Inc. (San Jose, CA)
    …factors while considering time to market, cost, risk, thermal, electrical, electromagnetic, and signal integrity performance and issues. + The ability to foster ... architectures for systems whereby dramatic improvements in size, area, power , cost, and quality can be achieved thru applications...as per the qualifications above + 5-10 years Mixed Signal and/or Custom IC engineering experience + Strong time… more
    Cadence Design Systems, Inc. (08/08/25)
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  • Electrical Engineer - Analog

    Teledyne (Poway, CA)
    …design from conception to product release. + Experience with several analog/mixed- signal IC development cycles including design, simulation, layout and testing. + ... Experience with low noise amplifier, filters and power supply design. + Experience with design practices such...design practices such as minimizing device mismatch, noise, and signal coupling is a plus. + Experience in board… more
    Teledyne (07/31/25)
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  • System Products Memory Solutions Engineer

    NVIDIA (Santa Clara, CA)
    …experience). + 2+ years relevant experience. + Understanding of high speed signal integrity and experience with oscilloscopes. + Understanding of schematic ... motivated hardware engineers to take our GPU memory subsystem from first silicon power -on to production. What you'll be doing: + Planning and performing DDR memory… more
    NVIDIA (07/17/25)
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  • Senior High-Performance ASIC Timing Engineer

    NVIDIA (Santa Clara, CA)
    …and experience in timing constraints generation, clocking, process variations and signal integrity + Proficiency in programming and scripting languages, ... and timing methodologies. + Finding the right tradeoffs and balance between power /area/congestions/etc. What we need to see: + BS (or equivalent experience) in… more
    NVIDIA (06/24/25)
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  • RTOS Embedded Engineer 5 (AHT)

    Northrop Grumman (Los Angeles, CA)
    …noise and signal generators; logic, spectrum, and network analyzers; and power sources and switches \#LI-MA1 Living in Northridge offers a perfect combination of ... more of the following: RT-Linux, FreeRTOS, VxWorks, or GH Integrity + Experience with VxWorks or similar RTOS at...hardware validation and verification of RF, digital or mixed signal devices + Experience with lab instruments such as… more
    Northrop Grumman (06/21/25)
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  • Physical Design Engineer - Multiple Levels

    Qualcomm (San Diego, CA)
    …(MMMC) clock tree synthesis, routing, timing optimization and closure, RC extraction, signal integrity , cross talk noise and delay analysis, debugging timing ... Physical Design Flow and deliveries of complex, high-speed, low power designs such as GPU, Camera and other MM,...Tasks also involve the development and enablement of low power implementation methods, customized P&R to achieve area reduction,… more
    Qualcomm (07/12/25)
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  • Mechanical Engineering Technical Leader

    Cisco (San Jose, CA)
    …keeping management informed. + Collaborate with cross functional teams (Hardware, Signal Integrity , CAD, Thermal, Manufacturing, etc.) to negotiate requirements ... platforms. Our devices deliver high speed without sacrificing programmability, buffering, power efficiency, scale or feature flexibility. You'll be part of our… more
    Cisco (07/22/25)
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