• Hardware Validation Engineer

    NVIDIA (Santa Clara, CA)
    …to debug and root cause challenging system issues involving board-level failures, signal integrity , component-level problems, and firmware behavior. + Lab ... be the best we can be. We are looking for a Hardware Validation Engineer in the Datacenter Systems Engineering team. You'll work closely with board designers,… more
    NVIDIA (07/18/25)
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  • Avionics Manufacturing Engineer

    Stratolaunch, LLC (Mojave, CA)
    …is seeking a level II, Sr-, or Staff-level to Avionics Manufacturing Engineer support design, integration, testing, and maintenance of the hypersonic vehicle ... provide real-time support on the shop floor + Troubleshoot electrical and avionics ground test issues + Develop test plans and procedures, as required + Support… more
    Stratolaunch, LLC (07/17/25)
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  • Memory Circuit Design Engineer

    Broadcom (Irvine, CA)
    …understanding of transistor level circuit behavior and device physics + Knowledge of signal integrity , EM/IR, and reliability issues + Understanding of memory ... please Sign-In before you apply.** **Job Description:** **Memory Circuit Design Engineer ** We are looking for energetic and passionate memory design engineers… more
    Broadcom (06/11/25)
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  • Senior HSIO Validation Engineer

    NVIDIA (Santa Clara, CA)
    …characterization/validation methods in post-silicon environment + Excellent knowledge of Signal integrity concepts, Silicon characteristics and high speed/SERDES ... Engage proactively with multi-functional engineering teams, including system architects, mixed- signal design, DGX, software/firmware, hardware/software quality assurance, operations, and… more
    NVIDIA (05/29/25)
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  • IC Design Engineer

    Broadcom (Irvine, CA)
    …and how they affect the timing/propagation of signals + - Understanding of Signal Integrity , Crosstalk Delay, and Glitch/Noise Analysis + - Understanding of ... CPUs. We are seeking a motivated and technically strong engineer to join our team. Job Description: + Leading...closure + Participate/contribute in silicon bring-up, characterization, and silicon test + Participate in timing closure of the blocks… more
    Broadcom (08/08/25)
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  • Electrical Engineer , Spectacles, Level 3

    Snap Inc. (Los Angeles, CA)
    …with senior engineers to debug hardware issues, including power quality, high-speed signal integrity , low speed interface performance, and coexistence + Analyze ... of glasses that bring augmented reality to life. We're looking for an Electrical Engineer to join the Spectacles team! What you'll do: + Own schematic design,… more
    Snap Inc. (07/31/25)
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  • CPU Server Physical Design Timing Engineer

    Qualcomm (Santa Clara, CA)
    …convergence at Chip-level and Hard-Macro level + In-depth knowledge cross-talk noise, Signal Integrity , Layout Parasitic Extraction, feed through handling, + ... CPU timing closure for Oryon CPU Cores. As a CPU Physical Design Timing Engineer , you will work with microarchitecture and RTL design team to develop timing… more
    Qualcomm (07/23/25)
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  • Electrical Engineer , Power Electronics…

    General Atomics (San Diego, CA)
    …system design tools (eg MATLAB Simulink, PLEXIM PLECS, Ridleyworks); HyperLynx Signal /Power Integrity tools. + Demonstrate technical expertise and application ... commercial customers worldwide. We have an exciting opportunity for an Electrical Engineer (EE) to join our Electrical Technologies team located in Rancho Bernardo.… more
    General Atomics (07/23/25)
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  • Physical Design Engineer - Multiple Levels

    Qualcomm (San Diego, CA)
    …(MMMC) clock tree synthesis, routing, timing optimization and closure, RC extraction, signal integrity , cross talk noise and delay analysis, debugging timing ... SOC and core design team. As a physical design engineer you will innovate, develop, and implement chips and...in this role involves good understanding of functional and test (DFT) mode constraints for place and route, floorplanning,… more
    Qualcomm (07/12/25)
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  • ASIC Implementation Engineer

    Broadcom (San Jose, CA)
    …place and route, clock methodology, power planning and analysis, timing closure, signal integrity and physical design checks. + Participate in large ... you apply.** **Job Description:** **Job Description:** + ASIC implementation engineer with demonstrated expertise in multiple disciplines including synthesis, design… more
    Broadcom (06/03/25)
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