• ASIC Design Engineer - New College…

    NVIDIA (Santa Clara, CA)
    design , verification, logic synthesis and timing analysis. + Exposure to Digital systems and VLSI design , Computer Architecture, Computer Arithmetic is ... NVIDIA is seeking ASIC Design Engineers to implement the world's leading SoC's...Collaborate and coordinate with architects, other designers, pre- and post- silicon verification teams, synthesis, timing and back-end teams to… more
    NVIDIA (11/18/25)
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  • Senior Mixed Signal Design Engineer

    NVIDIA (Santa Clara, CA)
    …join this diverse team and help move the needle! We are looking for a senior engineer to be part of the mixed-signal design team building next generation NVLINK. ... circuit designs at data rates of 25Gbps and higher from concept through silicon characterization. + Help by defining circuit requirements and complete design more
    NVIDIA (01/03/26)
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  • Senior Mixed Signal Design Engineer

    NVIDIA (Santa Clara, CA)
    …join this diverse team and help move the needle! We are looking for a senior engineer to be part of the mixed-signal design team building next generation NVLINK. ... circuit designs at data rates of 25Gbps and higher from concept through silicon characterization. + Help by defining circuit requirements and complete design more
    NVIDIA (11/23/25)
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  • R&D Engineer IC Design 3

    Broadcom (Irvine, CA)
    …equivalency checking, STA result review, CDC checks, Lint checks, RTL/gate level simulations & silicon debugging + scripting for various IC design tasks such as ... & development schedule + generate test plans for post silicon validation **Job Requirement:** + _B.S degree in EE...of related experience_ + Good knowledge of high speed digital circuit design . + Good knowledge of… more
    Broadcom (12/03/25)
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  • IC Design Engineer

    Broadcom (Irvine, CA)
    …Account, please Sign-In before you apply.** **Job Description:** **Job Description: IC Design Engineer ** + Participate in IP level architectural definition ... including micro-architecture definition + Perform RTL design using Verilog HDL, with an emphasis on performance and area + Implement multi-power and low-power… more
    Broadcom (11/18/25)
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  • Senior Circuit Design Engineer

    NVIDIA (Santa Clara, CA)
    …as part of a global circuits team to design innovative circuits ( digital , semi-custom and mixed-signal analog) for silicon correlation and noise mitigation. ... We are now looking for a motivated Senior Circuit Design Engineer to join our dynamic and...analysis on the design . + Drive the design and physical implementation of digital and/or… more
    NVIDIA (01/03/26)
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  • Senior ASIC Design Verification…

    NVIDIA (Santa Clara, CA)
    NVIDIA is seeking a hardworking Senior ASIC Design Verification Engineer to help drive sign-off strategies for world's leading GPUs and SoCs. This position ... innovative IPs for hardware security, clocking, voltage regulation and silicon correlation. + Own the unit and sub-system level...understanding of behavioral real number modeling and low level digital or mixed signal design concepts. +… more
    NVIDIA (12/18/25)
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  • Senior ASIC Design Engineer , Memory…

    NVIDIA (Santa Clara, CA)
    NVIDIA is looking for a Senior ASIC Design Engineer for our Memory Controller team! As a Senior ASIC Engineer , you'll join a group of hard-working engineers ... + BS, MS, or PhD in Electrical Engineering, Computer Engineer , or related degree required (or equivalent experience) +...understanding with Verilog or System Verilog. + Exposure to Digital systems and VLSI design , Computer Architecture,… more
    NVIDIA (12/23/25)
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  • Physical Design Engineer , Google…

    Google (Sunnyvale, CA)
    Physical Design Engineer , Google Cloud _corporate_fare_ Google _place_ Sunnyvale, CA, USA **Early** Experience completing work as directed, and collaborating ... behind products loved by millions worldwide, and leverage your design and verification expertise to verify complex digital...and its integration within AI/ML-driven systems. As a Physical Design Engineer , you will collaborate with RTL,… more
    Google (12/25/25)
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  • Physical Design Engineer

    Google (Sunnyvale, CA)
    Physical Design Engineer , University Graduate, PhD _corporate_fare_ Google _place_ Sunnyvale, CA, USA **Mid** Experience driving progress, solving problems, and ... on TPU architecture and its integration within AI/ML-driven systems. As a Physical Design Engineer , you will collaborate with Register-Transfer Level (RTL), … more
    Google (12/24/25)
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