- Google (Sunnyvale, CA)
- …of hardware experiences, delivering unparalleled performance, efficiency, and integration. As a Silicon Engineer , you will be a pivotal contributor to Google's ... silicon engineering through internships, academic research, or publications (eg, digital design , design verification, silicon validation, or system… more
- SpaceX (Sunnyvale, CA)
- …includes strategies for power and ground distribution as well as working with packaging engineer to determine pad locations + Accurately estimate the schedule ... who will work alongside world-class cross-disciplinary teams (systems architecture, ASIC design , firmware, pre- silicon verification, post- silicon validation,… more
- Applied Materials (Santa Clara, CA)
- …for Applied Materials and its Supply Base. Provide advanced training and support to Packaging Engineer III. Performs other duties as assigned. Duties will vary ... be working with a highly capable international team to develop advanced photonics packaging solution. You will lead optomechanical design , optical sub-assembly … more
- Texas Instruments (Santa Clara, CA)
- …SC Packaging organization. **Responsibilities may include:** + To define, design , develop and scale to volume production high voltage (200-3300V) packages and ... world. Love your job.** As a member of our Packaging team, you'll have the chance to interact with...rapid time-to market for new products. **Why TI?** + Engineer your future. We empower our employees to truly… more
- Fujifilm (Santa Clara, CA)
- **Position Overview** **POSITION SUMMARY:** Process Development Engineer II will play key role in developing new MEMS-based inkjet printhead products and improving ... manufacturing capabilities in assembly operation. Develop and improve print head packaging processes and technology. Own tools and the processes run on them,… more
- Meta (Menlo Park, CA)
- …practical experience 14. Perform package design for advanced custom silicon comprising single-chip/multi-chip and 3D or wafer packaging . This includes: ... **Summary:** Meta is looking for an experienced ASIC Packaging Engineer , Signal Integrity, and Power...20. Perform package design for advanced custom silicon comprising single-chip/multi-chip and 3D or wafer packaging… more
- Applied Materials (Santa Clara, CA)
- …. + **About the Role** We are looking for an expert, highly experienced Senior FEA Engineer to join our Advanced Packaging Modeling team. This is a critical role ... focused on developing thermal-mechanical simulations to support the design , development, and qualification of next-generation semiconductor packaging … more
- Meta (Sunnyvale, CA)
- **Summary:** Meta is looking for an experienced ASIC Packaging Engineer , Signal Integrity, and Power Integrity focus for its ASIC packaging team to support ... development of custom Silicon for Infrastructure as well as to develop packaging solutions that are optimal for our ASIC roadmap. We are building a competency… more
- Skyworks (Irvine, CA)
- Staff RFIC Design Engineer Apply now " Date:Aug 28, 2025 Location: Irvine, CA, US Company: Skyworks If you are looking for a challenging and exciting career in ... Market:Irvine CaliforniaNearest Secondary Market:Los Angeles Job Segment: Front End, Design Engineer , Network, Telecom, Telecommunications, Technology, Engineering… more
- NVIDIA (Santa Clara, CA)
- …assembly, test or packaging experience. + Strong background & experience in Silicon Photonics design , fabrication, test, packaging and assembly. + ... across high volume manufacturing sites. + Partner with internal design , fabrication and packaging multi-functional teams to...to stand out from the crowd: + Experience in Silicon Photonics device design or fabrication, including… more