• Senior Async and IO Timing Methodology Engineer

    NVIDIA (Santa Clara, CA)
    …modeling to architect and deploy robust timing signoff practices across high- performance SoCs. You will play a critical role in defining cross-domain timing ... interface timing models. + Support timing closure and signoff through timing audits, and silicon correlation. What We Need To See: + Bachelor's or Master's degree in… more
    NVIDIA (08/21/25)
    - Related Jobs

  • Principal Physical Design Engineer, ATG

    NVIDIA (Santa Clara, CA)
    …development and chip implementation all the way to GDS tapeout? Have you been an architect /team lead and subject matter expert? If yes, then we'd love to hear from ... experience + Experience in large VLSI physical design chip implementation on advanced silicon node technologies + Track record of production chip work + P&R CAD… more
    NVIDIA (07/31/25)
    - Related Jobs

  • Senior Hardware Development Engineer AWS AI & ML,…

    Amazon (Cupertino, CA)
    …and operates Amazon's fleet of Accelerated Servers using Internal Amazon design silicon or specialized purpose accelerators (EC2.TRN, INF, G, F + more instance ... server design and the knowledge of various teams to architect the solutions that we will deploy at scale....uniqueness. *Mentorship and Career Growth* We're continuously raising our performance bar as we strive to become Earth's Best… more
    Amazon (07/09/25)
    - Related Jobs