• Lead CPU Performance Architect…

    Google (Poughkeepsie, NY)
    …delivering unparalleled performance , efficiency, and integration. As a Lead CPU Performance Architect in architecture and performance , you will be ... between the performance model and RTL implementation, and perform pre- silicon and post- silicon performance bug triage. Google is proud to be an… more
    Google (06/21/25)
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  • Senior CPU Architecture and Performance…

    Google (Poughkeepsie, NY)
    … performance , efficiency, and integration. As a Senior CPU Architecture and Performance Architect , you will be the key contributor to improve processor ... between the performance model and RTL implementation and perform pre- silicon and post- silicon performance bug triage. Google is proud to be an… more
    Google (06/26/25)
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  • Worldwide Specialist Solutions Architect…

    Amazon (New York, NY)
    …large-scale workloads (eg, foundation models) on AWS. You will conduct model performance evaluations, optimizations and work directly with engineering and product to ... HPC systems (eg physics based simulations) to take advantage of high performance networking (eg Amazon EFA, Infiniband, RoCE), distributed parallel filesystems (eg… more
    Amazon (05/21/25)
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  • Embedded Software Engineer

    Meta (New York, NY)
    …and high-bandwidth 3. Lead hardware bring-up, peripheral drivers and communication, silicon integration, and power and performance management and optimization ... issues that span multiple layers from kernel to application 5. Profile performance problems and drive optimizations across the entire software stack 6. Analyze,… more
    Meta (06/24/25)
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  • CPU Architecture Lead

    Google (Poughkeepsie, NY)
    …delivering unparalleled performance , efficiency, and integration. As a Lead CPU Architect in architecture and performance , you will be the key contributor ... or equivalent practical experience. + 10 years of experience in high- performance microprocessor architecture, micro-architecture, performance , and design. +… more
    Google (06/11/25)
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  • CPU Cache Subsystem Design Manager

    Google (Poughkeepsie, NY)
    … performance enhancing microarchitecture features, and work with Software, Architect and Performance teams for trade-off studies. Communicate the ... in CPU memory subsystem design. + 10 years of experience in high- performance CPU, cache subsystem or AI accelerator logic/RTL design including microarchitecture… more
    Google (06/21/25)
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  • CPU Arithmetic Dataflow Design Manager

    Google (Poughkeepsie, NY)
    …Review performance enhancing microarchitecture features, and work with Software, Architect and Performance teams for trade-off studies. Communicate the pros ... or equivalent practical experience. + 10 years of experience in high- performance CPU, cache subsystem or AI accelerator logic/RTL design including microarchitecture… more
    Google (06/21/25)
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  • Software Engineer, Systems ML - Compilers

    Meta (New York, NY)
    …graphs to hardware implementations, model data-flows, create cost-benefit analysis and estimate silicon power and performance . 3. Contribute to the development ... systems. You will be part of our efforts to architect , design and implement a clean slate compiler for...tools. 4. Conduct design and code reviews. Evaluate code performance , debug, diagnose and drive resolution of compiler and… more
    Meta (06/28/25)
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  • Software Engineer, ML Compiler

    Meta (New York, NY)
    …graphs to hardware implementations, model data-flows, create cost-benefit analysis and estimate silicon power and performance . 3. Contribute to the development ... successful candidate will be part of our efforts to architect , design and implement a clean slate compiler for...tools. 4. Conduct design and code reviews. Evaluate code performance , debug, diagnose and drive resolution of compiler and… more
    Meta (06/03/25)
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