• CPU Cache Subsystem Design Manager

    Google (Portland, OR)
    performance enhancing microarchitecture features, and work with Software, Architect and Performance teams for trade-off studies. Communicate the ... in CPU memory subsystem design. + 10 years of experience in high- performance CPU, cache subsystem or AI accelerator logic/RTL design including microarchitecture… more
    Google (07/02/25)
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  • Senior Software Engineer - ATPG - Tessent

    Siemens (Wilsonville, OR)
    …of the industry-leading Tessent platform and are vital to our customers' success in silicon validation of ICs. The focus will be on developing solutions for the high ... performance and high scalability of the ATPG algorithms. Development...High productivity, exceptional problem-solving skills, and the ability to architect and implement high-quality and maintainable software are key.… more
    Siemens (06/01/25)
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  • Senior ASIC Verification Engineer - GPU

    NVIDIA (Hillsboro, OR)
    …plans to ensure that changes to the design are verifiable + Architect and plan the verification strategy and execution for sub-system features impacting ... your unit + Support post- silicon validation activities What we need to see: +...Would you love the challenge of creating the highest performance chips in the industry? If so, we want… more
    NVIDIA (05/08/25)
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