• Lead C++ Software Engineer

    Cadence Design Systems, Inc. (San Jose, CA)
    …FPGA-Based Prototyping product which is used by leading CPU/GPU/HyperScaler companies for pre- Silicon software validation of their SOC's. You will develop new ... impact on the world of technology. We are looking for an exceptional C++ software engineer to join the Protium Software Development Team to d evelop and enhance the… more
    Cadence Design Systems, Inc. (09/30/25)
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  • FPGA Engineer , Platforms, Hardware

    Google (Sunnyvale, CA)
    FPGA Engineer , Platforms, Hardware + _link_ Copy link + _email_ Email a friend _corporate_fare_ Google _place_ Sunnyvale, CA, USA **Mid** Experience driving ... power, and area goals. + Collaborate closely with Software, Systems, and Silicon Engineering teams to ensure seamless hardware/software integration and contribute to… more
    Google (09/28/25)
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  • Photonics Test Engineer

    Applied Materials (Santa Clara, CA)
    …more about our benefits (https://hrportal.ehr.com/applied/) . As an optoelectronics testing engineer , you'll be responsible for characterizing and testing our next ... test setups + Design and implement test procedures for silicon photonics chips and SIP based optical subsystems +...and SIP based optical subsystems + Design and execute validation and debug plans aligned with product specs, including… more
    Applied Materials (09/25/25)
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  • Sr. ASIC Design Engineer , Cloud-Scale…

    Amazon (Cupertino, CA)
    …teams, including architects, fellow designers, verification specialists, pre- and post- silicon validation teams, and synthesis, timing, and back-end ... making the right trade-offs. Key job responsibilities As an ASIC Design Engineer , you will: * Develop and implement high-performance, area and power-efficient RTL… more
    Amazon (09/13/25)
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  • Mechanical Engineer II

    Mercury Systems (Oxnard, CA)
    …Description J ob Summary Mercury Systems is seeking a hard-working, innovative mechanical engineer who can learn quickly and bring a fresh perspective to complex ... + Drafting Test plans and Inspection reports as part of verification and validation + Structuring Bills of Material (BOMs/PLs) + Drafting and managing Engineering… more
    Mercury Systems (09/09/25)
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  • Senior Async and IO Timing Methodology…

    NVIDIA (Santa Clara, CA)
    …inventiveness and intelligence. We are seeking a highly skilled Timing Methodology Engineer with expertise in asynchronous timing and I/O interface modeling to ... shifter timing. + Build automated flows for STA constraint generation, coverage validation , and regression-based signoff using tools like PrimeTime or Tempus. +… more
    NVIDIA (08/21/25)
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  • Senior System Verification Engineer

    NVIDIA (Santa Clara, CA)
    …and GPU Coherency + We have continual collaboration with Design, DV, Power, Silicon Validation , Performance, and Software teams. + Work constructively leading ... NVIDIA is looking for a Senior System Verification Engineer to join our Emulation division. We are a worldwide recognized division noted for groundbreaking… more
    NVIDIA (07/31/25)
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  • Senior Verification Engineer - Hardware

    NVIDIA (Santa Clara, CA)
    …environment issues. + We have continual collaboration with Design, DV, Power, Silicon Validation , Performance, and Software teams. + Work constructively leading ... NVIDIA is looking for a Verification Engineer to join our Emulation division. We are a worldwide recognized division noted for groundbreaking technology. We are… more
    NVIDIA (07/29/25)
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  • Power Electronics HIL Engineer

    Ford Motor Company (Long Beach, CA)
    …and failure reproduction You'll have + 5+ years of testing and validation experience. + Bachelor/master's degree in electrical engineering, Computer Science, or ... dSPACE/Typhoon/OPAL-RT. + Experience modeling semiconductor components like SiC, GaN and Silicon . + Knowledge of PWM methodologies, Dual active bridge DC-DC topology… more
    Ford Motor Company (09/30/25)
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  • Senior System SW Engineer , System…

    Palo Alto Networks (Santa Clara, CA)
    …new architectures and designs + Architectural models, test infrastructure, pre- and post- silicon validation + In-house Processor Tool Chain Development - ... Assembler, Debugger, Simulator + Infrastructure to support ASIC team development and verification + ASIC microcode and device driver development **Your Experience** Be part of System Architecture team defining the architecture of next generation ASICs, FPGAs… more
    Palo Alto Networks (09/19/25)
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