- Northrop Grumman (Los Angeles, CA)
- …history, they're making history. **Defense Systems** is looking for a **Multidisciplinary Design Analysis and Optimization (MDAO) Engineer (Level 3/4)** under ... impacts from changes in the system level requirements and architecture to the design and performance of the vehicle, in order to optimize the vehicle's performance… more
- Cadence Design Systems, Inc. (San Jose, CA)
- …make an impact on the world of technology. We are seeking a highly skilled Design Engineer to join our Palladium Solutions Development team, to drive the ... development of full-system design verification environments. This role focuses on developing and...Collaborate with cross-functional teams to ensure seamless integration from simulation to emulation. + Optimize designs for multi-clock domain… more
- Google (Mountain View, CA)
- Analog Mixed Signal Integrated Circuit Design Engineer _corporate_fare_ Google _place_ Mountain View, CA, USA **Mid** Experience driving progress, solving ... analog or mixed-signal IC design . + Experience in transistor-level schematic design , layout, simulation , and verification. + Experience with device physics… more
- Applied Materials (Santa Clara, CA)
- …you may go. Learn more about our benefits (https://hrportal.ehr.com/applied/) . **Waveguide Design Engineer ** We are seeking a full-time Waveguide Design ... new chip and advanced display in the world. We design , build and service cutting-edge equipment that helps our...create next generation technology, join us to deliver material innovation that changes the world. **What We Offer** Salary:… more
- Silvus Technologies (Los Angeles, CA)
- …a fulfilling career._ THE OPPORTUNITY Silvus is seeking a **_Principal FPGA / RTL Design Engineer - Signal Processing_** who will report to the _Director of FPGA ... growth is fueled by a focus on research and innovation and a team of the most passionate, skilled,...design of signal processing blocks. + RTL coding, simulation , and test bench development. + FPGA synthesis and… more
- Silvus Technologies (Irvine, CA)
- …fulfilling career._ THE OPPORTUNITY Silvus is seeking a full-time Principal FPGA / RTL Design Engineer who will report to the Senior Engineering Director for ... challenging real-world communication needs. The Principal FPGA / RTL Design Engineer position will be based at...design of signal processing blocks. * RTL coding, simulation , and test bench development. * FPGA synthesis and… more
- Applied Materials (Santa Clara, CA)
- …and package ecosystem + Good knowledge on EDA or EPDA tools for PIC design , simulation and tape out process. **Additional Information** **Time Type:** Full time ... new chip and advanced display in the world. We design , build and service cutting-edge equipment that helps our...create next generation technology, join us to deliver material innovation that changes the world. **What We Offer** Salary:… more
- Silvus Technologies (Irvine, CA)
- …_"?_ Silvus' rapid growth is fueled by a focus on research and innovation and a team of the most passionate, skilled, and creative thinking individuals. ... a fulfilling career._ THE OPPORTUNITY Silvus is seeking a full-time **_Senior FPGA Design Engineer_** reporting to the _Director of FPGA Engineering_ on the _FPGA… more
- Silvus Technologies (Los Angeles, CA)
- …to a fulfilling career._ THE OPPORTUNITY Silvus is seeking a **_Senior FPGA / RTL Design Engineer - Signal Processing_** who will report to the _Director of FPGA ... growth is fueled by a focus on research and innovation and a team of the most passionate, skilled,...and development process from concept to field deployment. FPGA Design Engineers are responsible for the efficient implementation of… more
- Google (Mountain View, CA)
- Senior CPU Design Verification DevOps Engineer _corporate_fare_ Google _place_ Austin, TX, USA; Mountain View, CA, USA; +3 more; +2 more **Mid** Experience ... schedulers (eg, Slurm, LSF, PBS). + Experience with major vendor Electronic design automation (EDA) tools/flows as well as emulation platforms (eg, Palladium,… more
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