- Meta (Austin, TX)
- …To apply, click "Apply to Job" online on this web page. **Required Skills:** ASIC , Design Verification Engineer Responsibilities: 1. Develop functional tests ... plan, functional and code coverage. 3. Define and implement IP/ SoC verification plans, build verifications test benches... ASIC development cycles 9. 3. Block/IP/sub-system and/or SoC level verification based on SystemVerilog UVM/OVM… more
- Amazon (Austin, TX)
- …/ Computer Engineering or related field - 6+ years experience in digital verification , preferably in image processor, SoC /Interfaces - 3+ years of experience ... highly differentiated silicon into Blink and Ring battery powered devices. Our verification team works on state-of-the art SoCs in a vertically integrated team… more
- Meta (Austin, TX)
- …Chip ( SoC ) and IP for data center applications. **Required Skills:** ASIC Engineer , Emulation Responsibilities: 1. Develop emulation testbenches in System ... **Summary:** Meta is hiring ASIC Emulation Engineers within our Infrastructure organization. We...assist pre-silicon validation. 4. Drive emulation methodologies for HW verification and SW development. 5. Develop emulation tools, workflows… more
- Meta (Austin, TX)
- …( SoC ) and IP for data center applications. **Required Skills:** ASIC Implementation Engineer - Synthesis Responsibilities: 1. Run Logic/Physical Synthesis ... **Summary:** Meta is hiring ASIC Implementation Engineers within our Infrastructure organization. We...Level and identify power reduction opportunities. 4. Run Formal Verification checks between RTL and Gate level netlist and… more
- Meta (Austin, TX)
- …( SoC ) and IP for data center applications. **Required Skills:** ASIC Implementation Engineer - Synthesis Responsibilities: 1. Run Logic/Physical Synthesis ... **Summary:** Meta is hiring ASIC Implementation Engineers within our Infrastructure organization. We...Level and identify power reduction opportunities. 4. Run Formal Verification checks between RTL and Gate level netlist and… more
- Meta (Austin, TX)
- …on Chip ( SoC ) and IP for data center applications. **Required Skills:** ASIC Engineer , Physical Design Responsibilities: 1. Develop and own physical design ... synthesis, static timing analysis, IR drop, EM, and physical verification in advanced technology nodes. 2. Resolve design and...physical design of an end-to-end IP or integration of ASIC / SoC design and point out lower power… more
- Meta (Austin, TX)
- … SoC and IP for data center applications. **Required Skills:** ASIC Engineer , Design Responsibilities: 1. Architecture exploration 2. Micro-architecture ... **Summary:** Meta is hiring ASIC Design Engineers within our Infrastructure organization to...hard IP identification, selection and integration 6. Collaboration with verification and emulation teams in test plan development and… more
- Amazon (Austin, TX)
- …including software applications, use models, system architecture and SoC architecture/micro-architecture solutions. * Participate in logic design activities ... as part of Amazon's machine learning custom silicon solutions. * Develop and execute design automation mechanisms and flows. * Work with physical design teams to achieve performance and area requirements. Mentorship & Career Growth Our team is dedicated to… more
- Amazon (Austin, TX)
- …scale and rapid integration of emergent technologies. We're looking for an ASIC Design Eengineer to help us trail-blaze new technologies and architectures, while ... job responsibilities - integrate multiple subsystems into top level SOC , ensure correct clock/reset/functional/DFT signal routing - As a...signal routing - As a key member of the ASIC design team, you will implement and deliver high… more
- Micron Technology, Inc. (Richardson, TX)
- …that are transforming how the world uses information to enrich life. As an HBM SOC Pre-Silicon Verification Engineer , you will be responsible for the design ... is successful. You will apply your deep understanding of SOC Architecture, RTL Logic Design, IP Integration, high-speed interface...only while the Logic chip can use a full ASIC flow. Lastly, verification and testing (validation)… more
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