- Amazon (Austin, TX)
- …Develop and maintain comprehensive gate-level simulation test plans for verifying ASIC functionality and timing. Analyze simulation results, identify and debug logic ... errors, and propose solutions. Work closely with design and verification engineers to validate fixes and ensure design closure....Work closely with the system architects to develop world-class SOC and IP blocks, which meet power, area and… more
- Amazon (Austin, TX)
- …Develop and maintain comprehensive gate-level simulation test plans for verifying ASIC functionality and timing. Analyze simulation results, identify and debug logic ... errors, and propose solutions. Work closely with design and verification engineers to validate fixes and ensure design closure....Work closely with the system architects to develop world-class SOC and IP blocks, which meet power, area and… more
- Meta (Austin, TX)
- … SoC and IP for data center applications. **Required Skills:** ASIC Engineer , Design Responsibilities: 1. Micro-architecture development. 2. RTL development ... **Summary:** Meta is hiring ASIC Design Engineers within our Infrastructure organization to...hard IP identification, selection and integration. 5. Collaboration with verification and emulation teams in test plan development and… more
- Meta (Austin, TX)
- … SoC and IP for data center applications. **Required Skills:** ASIC Engineer , Design Responsibilities: 1. Architecture exploration 2. Micro-architecture ... **Summary:** Meta is hiring ASIC Design Engineers within our Infrastructure organization to...hard IP identification, selection and integration 5. Collaboration with verification and emulation teams in test plan development and… more
- NVIDIA (Austin, TX)
- …lasting impact on the world. Join the NVIDIA System-On-Chip ( SOC ) group as an ASIC Design Engineer and make a broad impact. You will focus on improving ... industry-standard scripting languages + Experience in RTL design (Verilog), verification (SystemVerilog), System-On-Chip design/implementation flow, and design automation +… more
- Amazon (Austin, TX)
- …role you will: . Work closely with the system architects to develop world-class SOC and IP blocks, which meet power, area and performance targets. . Define, ... configure and integration SoC Subsystems . Contribute to the SoC .... Perform initial synthesis & timing analysis . Assist verification team in unit verification including test… more
- Micron Technology, Inc. (Richardson, TX)
- …that are transforming how the world uses information to enrich life. As an HBM SOC Design and Integration Engineer , you will be responsible for the design & ... is successful. You will apply your deep understanding of SOC Architecture, RTL Logic Design, IP Integration, high-speed interface...only while the Logic chip can use a full ASIC flow. Lastly, verification and testing (validation)… more
- Micron Technology, Inc. (Dallas, TX)
- …transforming how the world uses information to enrich life. As a MTS | DMTS HBM SOC Design Engineer , you will be responsible for the design & development of ... is successful. You will apply your deep understanding of SOC Architecture, RTL Logic Design, IP Integration, high-speed interface...only while the Logic chip can use a full ASIC flow. Lastly, verification and testing (validation)… more
- Amazon (Austin, TX)
- …accelerator SoCs for use by AWS internal teams. We're looking for a Senior SoC Modeling Engineer to join the team and deliver new functional models, ... debug - Work closely with architecture, RTL design, design verification , emulation, and software teams to build, debug, and...Experience programming with C++ and/or SystemC - Familiarity with SoC , CPU, GPU, and/or ASIC architecture and… more
- Meta (Austin, TX)
- …entire stack, from transistor, through architecture, to firmware, and algorithms. As a Design Verification Engineer at Meta Reality Labs, you will work with a ... of the art IPs or SoCs. **Required Skills:** Design Verification Engineer Responsibilities: 1. Work with researchers...UVM methodology. 9. 3+ years experience in IP/sub-system and/or SoC level verification based on SystemVerilog UVM/OVM… more