- Microsoft Corporation (Mountain View, CA)
- …this goal, the **Custom IP** team works with architects, technologists, and design engineers to define and deliver differentiating custom IPs which bring high ... Cloud. We are looking for a **Senior Engineer, Circuit Design ** with a dedicated passion for envisioning and creating...complex technical IPs and solutions in conjunction with our SoC partners. **Responsibilities** + Collaborate with SoC … more
- Meta (Sunnyvale, CA)
- …to Job" online on this web page. **Required Skills:** ASIC Engineer, Design Verification Responsibilities: 1. Define and implement block/IP/ SoC verification ... plans, build verification test benches to enable block/IP/sub-system/ SoC level verification. 2. Develop functional tests based on verification test plan. 3. Drive … more
- Capgemini (Santa Clara, CA)
- …you're considering** Join a collaborative and forward-thinking team as a Design Verification Engineer, contributing to the validation of advanced System-on-Chip ( ... SoC ) designs that integrate embedded CPUs and analog mixed-signal...work with cutting-edge technologies and partner with architects and design engineers to deliver high-quality silicon solutions. **Your role**… more
- Meta (Sacramento, CA)
- …to Job" online on this web page. **Required Skills:** ASIC Engineer, Design Verification Responsibilities: 1. Define and implement IP/ SoC verification plans, ... build verification test benches to enable IP/sub-system/ SoC level verification and develop functional tests based on...SoC (System On Chip) Verification 10. 4. Debugging design 11. 5. Functional Coverage 12. 6. Automation Scripting… more
- NVIDIA (Santa Clara, CA)
- …and solutions. Ways to stand out from the crowd: + Proven architectural and design experience in SoC or GPU software power management and optimization. + ... to mass production. You will play a pivotal role in crafting the design , architecture, and implementation of algorithms that define the efficiency of our products.… more
- Arrow Electronics (Mountain View, CA)
- **Position:** Design Verification Engineer **Job Description:** Principal Accountabilities * Responsible for architecting Verification Environment for ASIC SoC ... plan to multi-million gate product tapeout & for Test design and development * Develop complex self checking test...test benches with constraint random stimulus generation. * Architect SoC test FW and create test plan documentation to… more
- Google (Sunnyvale, CA)
- …equivalent practical experience. + 8 years of experience with IP Development or SoC Integration, from early architecture phase through tapeout. + 3 years of ... + 12 years of experience with IP Development or SoC Integration, from early architecture phase through tapeout. +...through tapeout. + Knowledge of high performance and low-power design techniques. + Knowledge of ASIC Verification, Design… more
- Meta (Sunnyvale, CA)
- …entire stack, from transistor, through architecture, to firmware, and algorithms. As a Design Verification Engineer at Meta Reality Labs, you will work with an ... group of researchers and engineers, and use your digital design and verifications skills to implement the testing infrastructure...to validate new core IP or System on Chip ( SoC ) implementations. You will work closely with researchers, architects… more
- Meta (Sunnyvale, CA)
- …6. Support hand-off and integration of developed subsystems/IP blocks into larger SOC environments 7. Develop and drive continuous Design Verification ... at the entire stack, through algorithms to architecture, transistors to firmware.As a Design Verification Engineer at Meta's Reality Labs, you will work with a group… more
- Amazon (Sunnyvale, CA)
- …and Amazon Echo. What will you help us create? The Role: As a Senior RTL Design Engineer, you will be part of an advanced architecture team that is exploring new ... for advanced functional blocks. You will participate in the design verification and bring-up of such blocks by writing...in consumer devices. They should be familiar with modern SoC architectures, various interconnect topologies such as AMBA AXI,… more