- Amazon (Sunnyvale, CA)
- …Edge that is powering the latest generation of Echo devices is looking for a Senior SoC Design -STA Engineer to continue to innovate on behalf of our ... STA) into SoC timing signoff flow. * Work for Systems and Architecture, SoC Integration, Verification , DFT, Mixed Signal, IP owners, Synthesis, Place & Route… more
- Amazon (Sunnyvale, CA)
- …Neural Edge that is powering the latest generation of Echo devices is looking for a Senior SoC Design - EM/IR Engineer to continue to innovate on behalf of ... PnR teams to converge and meet the goals of the design . Role will involve collaboration with Verification teams and get the right vectors for different types of… more
- Qualcomm (Santa Clara, CA)
- … designs. Minimum Skill sets: + MS in Computer Science/Computer Engineering/Electrical Engineer with 3 years of experience in SoC performance/power modeling ... experience in productizing features that improve performance/power characteristics of a design Role and Responsibilities + Develop a SoC performance/power… more
- Meta (Menlo Park, CA)
- … to build IP and System On Chip ( SoC ) for data center applications.As a Design Verification Engineer , you will be part of a team working with the ... **Summary:** Meta is hiring ASIC Design Verification Engineer within... Responsibilities: 1. Define and implement block/IP/System on Chip ( SoC ) verification plans, build verification … more
- Meta (Sunnyvale, CA)
- … to build IP and System On Chip ( SoC ) for data center applications. As a Design Verification Engineer , you will be part of an agile team working with the ... **Summary:** Meta is hiring ASIC Design Verification Engineer within...**Required Skills:** ASIC Engineer , Design Verification Responsibilities: 1. Define and implement IP/ SoC … more
- Meta (Menlo Park, CA)
- … to build IP and System On Chip ( SoC ) for data center applications.As a Design Verification Engineer , you will be part of a dynamic team working with ... **Summary:** Meta is hiring ASIC Design Verification Engineer within...**Required Skills:** ASIC Engineer , Design Verification Responsibilities: 1. Define and implement IP/ SoC … more
- Meta (Sunnyvale, CA)
- … to build IP and System On Chip ( SoC ) for data center applications.As a Design Verification Engineer , you will be part of a agile team working with ... **Summary:** Meta is hiring ASIC Design Verification Engineer within...**Required Skills:** ASIC Engineer , Design Verification Responsibilities: 1. Define and implement IP/ SoC … more
- Capgemini (Santa Clara, CA)
- …the job you're considering** Join a collaborative and forward-thinking team as a Design Verification Engineer , contributing to the validation of advanced ... environments using SystemVerilog and UVM for IP and SoC designs. + Develop test plans and coverage metrics...or equivalent, with 7 years of experience in pre-silicon design verification . + Expertise in SystemVerilog, UVM,… more
- Meta (Sunnyvale, CA)
- …apply, click "Apply to Job" online on this web page. **Required Skills:** ASIC Engineer , Design Verification Responsibilities: 1. Evaluate, develop and drive ... PCIe/Ethernet/DDR, computer architecture and NOC. 4. Define and implement IP/ SoC verification plans, build verification ...based on verification test plan. 6. Drive Design Verification to closure based on defined… more
- Meta (Sunnyvale, CA)
- …on this web page. **Required Skills:** ASIC Engineer , Design Verification Responsibilities: 1. Define and implement block/IP/ SoC verification plans, ... build verification test benches to enable block/IP/sub-system/ SoC level verification . 2. Develop functional tests...based on verification test plan. 3. Drive Design Verification to closure based on defined… more